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| author | Jiansong Chen <Jiansong.Chen@amd.com> | 2020-08-27 14:31:20 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-09-03 00:36:02 -0400 |
| commit | 33286b793b079c237ee73f7264294769ea0e8076 (patch) | |
| tree | 3ddb03361f2cdf58b4951db6ae331fbe6bff0612 /drivers/gpu/drm/drm_mode_object.c | |
| parent | 971df65cbf32da9bc9af52c1196ca504dd316086 (diff) | |
drm/amd/pm: enable MP0 DPM for sienna_cichlid
Enable MP0 clock DPM for sienna_cichlid.
Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/drm_mode_object.c')
0 files changed, 0 insertions, 0 deletions