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| author | Jiri Kosina <jkosina@suse.cz> | 2010-09-24 14:03:37 +0200 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2010-09-24 14:03:37 +0200 |
| commit | 73e6d6c6467771838c1fc6949e6768a12ed72464 (patch) | |
| tree | 94dd60891869a0a275cd332c4e675cf0b101fcfa /drivers/gpu/drm/drm_modes.c | |
| parent | 12e5272585901217e919da810c801e5084ee0cb1 (diff) | |
| parent | a850ea30374ebed32a0724742601861853fde869 (diff) | |
Merge branch 'master' into upstream
Diffstat (limited to 'drivers/gpu/drm/drm_modes.c')
| -rw-r--r-- | drivers/gpu/drm/drm_modes.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index f1f473ea97d3..949326d2a8e5 100644 --- a/drivers/gpu/drm/drm_modes.c +++ b/drivers/gpu/drm/drm_modes.c @@ -251,7 +251,10 @@ struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; /* Fill in HSync values */ drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; - drm_mode->hsync_start = drm_mode->hsync_end = CVT_RB_H_SYNC; + drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; + /* Fill in VSync values */ + drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; + drm_mode->vsync_end = drm_mode->vsync_start + vsync; } /* 15/13. Find pixel clock frequency (kHz for xf86) */ drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; |