diff options
| author | Madhav Chauhan <madhav.chauhan@intel.com> | 2018-07-05 18:31:48 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2018-07-05 16:27:56 +0300 |
| commit | 27efd2566cb89b7909366dbb88add8fb1e3d24e2 (patch) | |
| tree | aff783880ce68ba7feb9b1607ade8fcc33f47454 /drivers/gpu/drm/drm_rect.c | |
| parent | 0f17d5dd2199555830482b638a5fc8bf915f2f10 (diff) | |
drm/i915/icl: Define register for DSI PLL
This patch adds the new registers and corresponding bit definitions
which will be used for programming/enable DSI PLL.
v2: Review comments from Jani N
- Fix spaces while defining ICL_ESC_CLK_DIV_MASK
- Define shift and mask for bitfields.
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1530795727-28644-2-git-send-email-madhav.chauhan@intel.com
Diffstat (limited to 'drivers/gpu/drm/drm_rect.c')
0 files changed, 0 insertions, 0 deletions