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authorZhao Yakui <yakui.zhao@intel.com>2012-08-08 13:53:48 +0000
committerDave Airlie <airlied@redhat.com>2012-08-24 09:28:58 +1000
commitd66760962d75af12697d5197b3e97d51fe64169c (patch)
tree8fe91ce6d5592b3ecf9e1327d5d442d5b6a37224 /drivers/gpu/drm/gma500/cdv_intel_hdmi.c
parent25e9dc69709afad2be8de4ac2ecd6015356936ca (diff)
gma500: Program the DPLL lane based on the selected digitial port
Based on the spec, the CRT output doesn't use the lane. And the HDMI B output uses the Lane0/1 while the HDMI C output uses the Lane 2/3. But currently it will program all the four lanes for the CRT/HDMI. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> [Ported to the in-kernel driver] Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/gma500/cdv_intel_hdmi.c')
-rw-r--r--drivers/gpu/drm/gma500/cdv_intel_hdmi.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
index a86f87b9ddde..0c90f0316db1 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
@@ -352,9 +352,11 @@ void cdv_hdmi_init(struct drm_device *dev,
switch (reg) {
case SDVOB:
ddc_bus = GPIOE;
+ psb_intel_encoder->ddi_select = DDI0_SELECT;
break;
case SDVOC:
ddc_bus = GPIOD;
+ psb_intel_encoder->ddi_select = DDI1_SELECT;
break;
default:
DRM_ERROR("unknown reg 0x%x for HDMI\n", reg);