diff options
| author | Thomas Zimmermann <tzimmermann@suse.de> | 2021-01-29 10:56:00 +0100 |
|---|---|---|
| committer | Patrik Jakobsson <patrik.r.jakobsson@gmail.com> | 2021-02-01 10:32:28 +0100 |
| commit | b51035c200bd3423ae5b6b98b54735ef424dc746 (patch) | |
| tree | 0c87cb4887df88cdb37bfc18426c0217ebd1b588 /drivers/gpu/drm/gma500/psb_intel_reg.h | |
| parent | e4abd7ad2b779c6309237a79bdcc5a128fb755ef (diff) | |
drm/gma500: Remove Medfield support
Medfield is an outdated mobile platform with apparently no users left.
Remove it from gma500.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210129095604.32423-2-tzimmermann@suse.de
Diffstat (limited to 'drivers/gpu/drm/gma500/psb_intel_reg.h')
| -rw-r--r-- | drivers/gpu/drm/gma500/psb_intel_reg.h | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/drivers/gpu/drm/gma500/psb_intel_reg.h b/drivers/gpu/drm/gma500/psb_intel_reg.h index 835cc924c45a..364ea8f06f9c 100644 --- a/drivers/gpu/drm/gma500/psb_intel_reg.h +++ b/drivers/gpu/drm/gma500/psb_intel_reg.h @@ -595,7 +595,7 @@ struct dpst_guardband { #define PIPE_PIXEL_MASK 0x00ffffff #define PIPE_PIXEL_SHIFT 0 -#define FW_BLC_SELF 0x20e0 +#define FW_BLC_SELF 0x20e0 #define FW_BLC_SELF_EN (1<<15) #define DSPARB 0x70030 @@ -789,17 +789,9 @@ struct dpst_guardband { * MOORESTOWN delta registers */ #define MRST_DPLL_A 0x0f014 -#define MDFLD_DPLL_B 0x0f018 -#define MDFLD_INPUT_REF_SEL (1 << 14) -#define MDFLD_VCO_SEL (1 << 16) #define DPLLA_MODE_LVDS (2 << 26) /* mrst */ -#define MDFLD_PLL_LATCHEN (1 << 28) -#define MDFLD_PWR_GATE_EN (1 << 30) -#define MDFLD_P1_MASK (0x1FF << 17) #define MRST_FPA0 0x0f040 #define MRST_FPA1 0x0f044 -#define MDFLD_DPLL_DIV0 0x0f048 -#define MDFLD_DPLL_DIV1 0x0f04c #define MRST_PERF_MODE 0x020f4 /* @@ -848,7 +840,6 @@ struct dpst_guardband { #define MRST_DSPABASE 0x7019c #define MRST_DSPBBASE 0x7119c -#define MDFLD_DSPCBASE 0x7219c /* * Moorestown registers. @@ -930,7 +921,6 @@ struct dpst_guardband { #define DEVICE_RESET_REG 0xb01C #define DPI_RESOLUTION_REG 0xb020 #define RES_V_POS 0x10 -#define DBI_RESOLUTION_REG 0xb024 /* Reserved for MDFLD */ #define HORIZ_SYNC_PAD_COUNT_REG 0xb028 #define HORIZ_BACK_PORCH_COUNT_REG 0xb02C #define HORIZ_FRONT_PORCH_COUNT_REG 0xb030 |