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authorMatt Roper <matthew.d.roper@intel.com>2023-09-06 17:10:10 -0700
committerMatt Roper <matthew.d.roper@intel.com>2023-09-08 15:45:23 -0700
commit53dd7b1fb4e54d5f029824636b6d17504a4fe80c (patch)
treedbe25b4ec4599c71551e964e671e8ad0dc735329 /drivers/gpu/drm/i915/Makefile
parent3d0a1688fe5b7ff46e4d308488aee38b4146868b (diff)
drm/i915/display: Extract display workarounds from clock gating init
Several of the register updates that are currently done in the clock gating init functions are actually display workarounds that should move into the display-specific part of the code. Furthermore, some of the registers being programmed don't even have anything to do with clock gating at all. Extract the display workarounds for gen11 and later platforms to a dedicated display/intel_display_wa.c file to keep these separate from the SOC / sgunit clock gating that we need on some platforms. The gen11 cutoff here is selected somewhat arbitrarily; this is the point where workarounds were first assigned dedicated lineage numbers that can be easily looked up and confirmed in the modern workaround database. It also avoids any confusion on older platforms where the exact boundaries between display/GT/other IP blocks wasn't as well-defined as it is today. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230907001009.3732474-2-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/Makefile')
-rw-r--r--drivers/gpu/drm/i915/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 79f65eff6bb2..1b2e02e9d92c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -248,6 +248,7 @@ i915-y += \
display/intel_display_power_well.o \
display/intel_display_reset.o \
display/intel_display_rps.o \
+ display/intel_display_wa.o \
display/intel_dmc.o \
display/intel_dpio_phy.o \
display/intel_dpll.o \