diff options
author | Jani Nikula <jani.nikula@intel.com> | 2023-02-13 21:59:59 +0200 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2023-02-15 12:00:50 +0200 |
commit | 0e7a16f9ddde61d7d65bae9c7ddda2e4a22cbc12 (patch) | |
tree | 909fd4594df53870ccfb7570754b7ddf64cf5af6 /drivers/gpu/drm/i915/display/i9xx_wm.c | |
parent | 284c5baa44218ef615ed8f5edcd6cfdedaef6abc (diff) |
drm/i915/wm: add .get_hw_state to watermark funcs
Get rid of the if ladder in intel_modeset_setup_hw_state() and hide a
number of functions by adding a .get_hw_state() hook to watermark
functions. At least for now, combine the platform specific sanitization
to the hw state readouts on the relevant platforms instead of adding a
separate hook for that.
There's a functional change on PCH split platforms: If i9xx_wm_init()
fails to read plane latency and chooses the nop functions,
ilk_wm_get_hw_state() won't get called for readout. Add the
ilk_init_lp_watermarks() call on that path which now won't be called in
.get_hw_state(), as it looks like the only thing that could make a
difference.
v2:
- Add missing static (kernel test robot)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6da32831e40606cc8b90491b83196917f2ce36ab.1676317696.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/i9xx_wm.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/i9xx_wm.c | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c index 676c79dd7b5a..dfdd40991871 100644 --- a/drivers/gpu/drm/i915/display/i9xx_wm.c +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c @@ -3487,7 +3487,7 @@ static void vlv_read_wm_values(struct drm_i915_private *dev_priv, #undef _FW_WM #undef _FW_WM_VLV -void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv) +static void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv) { struct g4x_wm_values *wm = &dev_priv->display.wm.g4x; struct intel_crtc *crtc; @@ -3580,7 +3580,7 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv) str_yes_no(wm->fbc_en)); } -void g4x_wm_sanitize(struct drm_i915_private *dev_priv) +static void g4x_wm_sanitize(struct drm_i915_private *dev_priv) { struct intel_plane *plane; struct intel_crtc *crtc; @@ -3629,7 +3629,13 @@ void g4x_wm_sanitize(struct drm_i915_private *dev_priv) mutex_unlock(&dev_priv->display.wm.wm_mutex); } -void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) +static void g4x_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915) +{ + g4x_wm_get_hw_state(i915); + g4x_wm_sanitize(i915); +} + +static void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) { struct vlv_wm_values *wm = &dev_priv->display.wm.vlv; struct intel_crtc *crtc; @@ -3729,7 +3735,7 @@ void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr); } -void vlv_wm_sanitize(struct drm_i915_private *dev_priv) +static void vlv_wm_sanitize(struct drm_i915_private *dev_priv) { struct intel_plane *plane; struct intel_crtc *crtc; @@ -3775,6 +3781,12 @@ void vlv_wm_sanitize(struct drm_i915_private *dev_priv) mutex_unlock(&dev_priv->display.wm.wm_mutex); } +static void vlv_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915) +{ + vlv_wm_get_hw_state(i915); + vlv_wm_sanitize(i915); +} + /* * FIXME should probably kill this and improve * the real watermark readout/sanitation instead @@ -3791,7 +3803,7 @@ static void ilk_init_lp_watermarks(struct drm_i915_private *dev_priv) */ } -void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv) +static void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv) { struct ilk_wm_values *hw = &dev_priv->display.wm.hw; struct intel_crtc *crtc; @@ -3829,6 +3841,7 @@ static const struct intel_wm_funcs ilk_wm_funcs = { .compute_intermediate_wm = ilk_compute_intermediate_wm, .initial_watermarks = ilk_initial_watermarks, .optimize_watermarks = ilk_optimize_watermarks, + .get_hw_state = ilk_wm_get_hw_state, }; static const struct intel_wm_funcs vlv_wm_funcs = { @@ -3837,6 +3850,7 @@ static const struct intel_wm_funcs vlv_wm_funcs = { .initial_watermarks = vlv_initial_watermarks, .optimize_watermarks = vlv_optimize_watermarks, .atomic_update_watermarks = vlv_atomic_update_fifo, + .get_hw_state = vlv_wm_get_hw_state_and_sanitize, }; static const struct intel_wm_funcs g4x_wm_funcs = { @@ -3844,6 +3858,7 @@ static const struct intel_wm_funcs g4x_wm_funcs = { .compute_intermediate_wm = g4x_compute_intermediate_wm, .initial_watermarks = g4x_initial_watermarks, .optimize_watermarks = g4x_optimize_watermarks, + .get_hw_state = g4x_wm_get_hw_state_and_sanitize, }; static const struct intel_wm_funcs pnv_wm_funcs = { @@ -3877,6 +3892,7 @@ void i9xx_wm_init(struct drm_i915_private *dev_priv) dev_priv->display.wm.spr_latency[0] && dev_priv->display.wm.cur_latency[0])) { dev_priv->display.funcs.wm = &ilk_wm_funcs; } else { + ilk_init_lp_watermarks(dev_priv); drm_dbg_kms(&dev_priv->drm, "Failed to read display plane latency. " "Disable CxSR\n"); |