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authorVille Syrjälä <ville.syrjala@linux.intel.com>2023-04-04 20:54:30 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2023-04-13 21:02:30 +0300
commit435db526a68b6454a882eae7a3768c516d4b540e (patch)
tree06aeefb0aacc9b11134385cdf11a63aa7c2acd4e /drivers/gpu/drm/i915/display/intel_acpi.h
parenta2da67028cd05516343533c1609fcaf037237fed (diff)
drm/i915: Evade transcoder's vblank when doing seamless M/N changes
The transcoder M/N values are double buffered on the transcoder's undelayed vblank. So when doing seamless M/N fastsets we need to evade also that. Note that currently the pipe's delayed vblank == transcoder's undelayed vblank, so this is still a nop change. But in the future when we may have to delay the pipe's vblank to create a register programming window ("window2") for the DSB. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230404175431.23064-2-ville.syrjala@linux.intel.com Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_acpi.h')
0 files changed, 0 insertions, 0 deletions