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authorDaniel Vetter <daniel.vetter@ffwll.ch>2023-03-24 20:22:02 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2023-03-24 20:22:03 +0100
commit7ed34927254ae9eac0f6b0ad7e7c2bceb96fcdfc (patch)
treec3a49534fe3c663aa130463caab7e2160fd96488 /drivers/gpu/drm/i915/display/intel_ddi.h
parent9578a10d4a2b4bcbbebefb4156c16c82ee725b3a (diff)
parent883631771038d1b0c10c0929e31bbd5ffb5e682c (diff)
Merge tag 'drm-intel-next-2023-03-23' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Core Changes: - drm: Add SDP Error Detection Configuration Register (Arun) Driver Changes: - Meteor Lake enabling and fixes (RK, Jose, Madhumitha) - Lock the fbdev obj before vma pin (Tejas) - DSC fixes (Stanislav) - Fixes and clean-up on opregion code (Imre) - More wm/vblank stuff (Ville) - More general display code organization (Jani) - DP Fixes (Stanislav, Ville) - Introduce flags to ignore long HPD and link training issues \ for handling spurious issues on CI (Vinod) - Plane cleanups and extra registers (Ville) - Update audio keepalive clock values (Clint) - Rename find_section to bdb_find_section (Maarten) - DP SDP CRC16 for 128b132b link layer (Arun) - Fix various issues with noarm register writes (Ville) - Fix a few TypeC / MST issues (Imre) - Create GSC submission targeting HDCP and PXP usages on MTL+ (Suraj) - Enable HDCP2.x via GSC CS (Suraj) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZBy56qc9C00tCLOY@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_ddi.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_ddi.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index 361f6874dde5..c85e74ae68e4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -40,6 +40,9 @@ void hsw_ddi_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void hsw_ddi_disable_clock(struct intel_encoder *encoder);
bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder);
+enum icl_port_dpll_id
+intel_ddi_port_pll_type(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state);
void hsw_ddi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state);
struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);