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authorVille Syrjälä <ville.syrjala@linux.intel.com>2023-03-11 01:58:27 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2023-03-18 14:24:57 +0200
commit84f4ebe8c1abbe375babbea46eab746a0060e80c (patch)
treee455057997b93595edee47a400f63cf9d2a2d862 /drivers/gpu/drm/i915/display/intel_display.c
parent6e8acb6686d805ac5d127fb691e28e742248c523 (diff)
drm/i915: Relocate intel_crtc_update_active_timings()
Move intel_crtc_update_active_timings() into intel_vblank.c where it more properly belongs. Also do the s/dev_priv/i915/ modernization rename while at it. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230310235828.17439-3-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_display.c84
1 files changed, 0 insertions, 84 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 4fd64dcfaf12..e044b97a516b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5902,90 +5902,6 @@ int intel_modeset_all_pipes(struct intel_atomic_state *state,
return 0;
}
-void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state)
-{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct drm_display_mode adjusted_mode;
- int vmax_vblank_start = 0;
- unsigned long irqflags;
-
- drm_mode_init(&adjusted_mode, &crtc_state->hw.adjusted_mode);
-
- if (crtc_state->vrr.enable) {
- adjusted_mode.crtc_vtotal = crtc_state->vrr.vmax;
- adjusted_mode.crtc_vblank_end = crtc_state->vrr.vmax;
- adjusted_mode.crtc_vblank_start = intel_vrr_vmin_vblank_start(crtc_state);
- vmax_vblank_start = intel_vrr_vmax_vblank_start(crtc_state);
- }
-
- /*
- * Belts and suspenders locking to guarantee everyone sees 100%
- * consistent state during fastset seamless refresh rate changes.
- *
- * vblank_time_lock takes care of all drm_vblank.c stuff, and
- * uncore.lock takes care of __intel_get_crtc_scanline() which
- * may get called elsewhere as well.
- *
- * TODO maybe just protect everything (including
- * __intel_get_crtc_scanline()) with vblank_time_lock?
- * Need to audit everything to make sure it's safe.
- */
- spin_lock_irqsave(&dev_priv->drm.vblank_time_lock, irqflags);
- spin_lock(&dev_priv->uncore.lock);
-
- drm_calc_timestamping_constants(&crtc->base, &adjusted_mode);
-
- crtc->vmax_vblank_start = vmax_vblank_start;
-
- crtc->mode_flags = crtc_state->mode_flags;
-
- /*
- * The scanline counter increments at the leading edge of hsync.
- *
- * On most platforms it starts counting from vtotal-1 on the
- * first active line. That means the scanline counter value is
- * always one less than what we would expect. Ie. just after
- * start of vblank, which also occurs at start of hsync (on the
- * last active line), the scanline counter will read vblank_start-1.
- *
- * On gen2 the scanline counter starts counting from 1 instead
- * of vtotal-1, so we have to subtract one (or rather add vtotal-1
- * to keep the value positive), instead of adding one.
- *
- * On HSW+ the behaviour of the scanline counter depends on the output
- * type. For DP ports it behaves like most other platforms, but on HDMI
- * there's an extra 1 line difference. So we need to add two instead of
- * one to the value.
- *
- * On VLV/CHV DSI the scanline counter would appear to increment
- * approx. 1/3 of a scanline before start of vblank. Unfortunately
- * that means we can't tell whether we're in vblank or not while
- * we're on that particular line. We must still set scanline_offset
- * to 1 so that the vblank timestamps come out correct when we query
- * the scanline counter from within the vblank interrupt handler.
- * However if queried just before the start of vblank we'll get an
- * answer that's slightly in the future.
- */
- if (DISPLAY_VER(dev_priv) == 2) {
- int vtotal;
-
- vtotal = adjusted_mode.crtc_vtotal;
- if (adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
- vtotal /= 2;
-
- crtc->scanline_offset = vtotal - 1;
- } else if (HAS_DDI(dev_priv) &&
- intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
- crtc->scanline_offset = 2;
- } else {
- crtc->scanline_offset = 1;
- }
-
- spin_unlock(&dev_priv->uncore.lock);
- spin_unlock_irqrestore(&dev_priv->drm.vblank_time_lock, irqflags);
-}
-
/*
* This implements the workaround described in the "notes" section of the mode
* set sequence documentation. When going from no pipes or single pipe to