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authorVille Syrjälä <ville.syrjala@linux.intel.com>2019-12-13 21:52:17 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2019-12-18 16:47:34 +0200
commit773b4b54351c0491d4edbfc9caf1ee0231e7c506 (patch)
treee7bec505c4b9e55c9ddea1dd88043c14a64f8ad2 /drivers/gpu/drm/i915/display/intel_display.h
parentf5271ee50d28451d960072737e55d826c7976fc4 (diff)
drm/i915: Move stuff from haswell_crtc_disable() into encoder .post_disable()
Move all of haswell_crtc_disable() into the encoder .post_disable() hooks. Now we're left with just calling the .disable() and .post_disable() hooks back to back. I chose to move the code into the .post_disable() hook instead of the .disable() hook as most of the sequence is currently implemented in the .post_disable() hook. We should collapse it all down to just one hook and then the encoders can drive the modeset sequence fully. But that may need some further refactoring as we currently call the ddi .post_disable() hook from mst code and we can't just replace that with a call to the ddi .disable() hook. Should also follow up with similar treatment for the enable sequence but let's start here where it's easier. Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191213195217.15168-5-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_display.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 327376810f66..ff496cfbd4ab 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -485,6 +485,7 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
void intel_plane_destroy(struct drm_plane *plane);
+void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state);
void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);
@@ -518,6 +519,7 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,
int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc);
+void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state);
int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
void vlv_wait_port_ready(struct drm_i915_private *dev_priv,
@@ -576,6 +578,8 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_center);
int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
+void skylake_scaler_disable(const struct intel_crtc_state *old_crtc_state);
+void ironlake_pfit_disable(const struct intel_crtc_state *old_crtc_state);
u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state);
u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state);