diff options
| author | Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> | 2022-11-23 12:05:51 +0200 |
|---|---|---|
| committer | Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> | 2022-12-13 18:17:52 +0200 |
| commit | d797f67d1e2568b152ee1af2334b11c1a48e5594 (patch) | |
| tree | ffe357f46ef15c69dc388b702bbfad8b174e7b97 /drivers/gpu/drm/i915/display/intel_dp.h | |
| parent | d51f25eb479aeb61c194089f66261be67ff9237a (diff) | |
drm/i915: Extract VESA DSC bpp alignment to separate function
We might to use that function separately from intel_dp_dsc_compute_config
for DP DSC over MST case, because allocating bandwidth in that
case can be a bit more tricky. So in order to avoid code copy-pasta
lets extract this to separate function and reuse it for both SST
and MST cases.
v2: Removed multiple blank lines
v3: Rename intel_dp_dsc_nearest_vesa_bpp to intel_dp_dsc_nearest_valid_bpp
to reflect its meaning more properly.
(Manasi Navare)
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221123100551.29080-1-stanislav.lisovskiy@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index c6539a6915e9..e4faccf87370 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -120,6 +120,7 @@ static inline unsigned int intel_dp_unused_lane_mask(int lane_count) } u32 intel_dp_mode_to_fec_clock(u32 mode_clock); +u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp); void intel_ddi_update_pipe(struct intel_atomic_state *state, struct intel_encoder *encoder, |