diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-11 19:24:21 +0200 |
---|---|---|
committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-15 00:15:05 +0200 |
commit | f0a57798fb5c68e7537e75a4acd81f697fd6c089 (patch) | |
tree | aa7fc631c08d58c7174141dd532c35e6b772e5e6 /drivers/gpu/drm/i915/display/intel_drrs.c | |
parent | 43af674357114db77cfa19be06aa48d8159610f7 (diff) |
drm/i915: Introduce intel_panel_drrs_type()
Add a helper to determine which type of DRRS the panel supports.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220311172428.14685-10-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_drrs.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_drrs.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c index 2a58bf4cb6cd..c663df51a84a 100644 --- a/drivers/gpu/drm/i915/display/intel_drrs.c +++ b/drivers/gpu/drm/i915/display/intel_drrs.c @@ -48,11 +48,8 @@ */ static bool can_enable_drrs(struct intel_connector *connector, - const struct intel_crtc_state *pipe_config, - const struct drm_display_mode *downclock_mode) + const struct intel_crtc_state *pipe_config) { - const struct drm_i915_private *i915 = to_i915(connector->base.dev); - if (pipe_config->vrr.enable) return false; @@ -65,8 +62,7 @@ static bool can_enable_drrs(struct intel_connector *connector, if (pipe_config->has_psr) return false; - return downclock_mode && - i915->vbt.drrs_type == DRRS_TYPE_SEAMLESS; + return intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS; } void @@ -80,7 +76,7 @@ intel_drrs_compute_config(struct intel_dp *intel_dp, intel_panel_downclock_mode(connector, &pipe_config->hw.adjusted_mode); int pixel_clock; - if (!can_enable_drrs(connector, pipe_config, downclock_mode)) { + if (!can_enable_drrs(connector, pipe_config)) { if (intel_cpu_transcoder_has_m2_n2(i915, pipe_config->cpu_transcoder)) intel_zero_m_n(&pipe_config->dp_m2_n2); return; |