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authorJosé Roberto de Souza <jose.souza@intel.com>2019-11-27 17:48:52 -0800
committerJosé Roberto de Souza <jose.souza@intel.com>2019-12-02 12:06:16 -0800
commit551fb93d4ab3845f358c9e24a5eb38275796073a (patch)
tree252fb1c7b9f4590ba3327d936e2dd295e5d5c610 /drivers/gpu/drm/i915/display/intel_vbt_defs.h
parentba0af30d24e992534212b453a39695c6feae886e (diff)
drm/i915/vbt: Parse power conservation features block
From VBT 228+ this is block that PSR and other power saving features configuration should be read from. v3: Using DRRS from this new block v4: Using BIT() Fixing DRRS comment in parse_power_conservation_features() Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191128014852.214135-5-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_vbt_defs.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_vbt_defs.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index f0338da3a82a..98b71dc32d2a 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -794,6 +794,35 @@ struct bdb_lfp_backlight_data {
} __packed;
/*
+ * Block 44 - LFP Power Conservation Features Block
+ */
+
+struct als_data_entry {
+ u16 backlight_adjust;
+ u16 lux;
+} __packed;
+
+struct agressiveness_profile_entry {
+ u8 dpst_agressiveness : 4;
+ u8 lace_agressiveness : 4;
+} __packed;
+
+struct bdb_lfp_power {
+ u8 lfp_feature_bits;
+ struct als_data_entry als[5];
+ u8 lace_aggressiveness_profile;
+ u16 dpst;
+ u16 psr;
+ u16 drrs;
+ u16 lace_support;
+ u16 adt;
+ u16 dmrrs;
+ u16 adb;
+ u16 lace_enabled_status;
+ struct agressiveness_profile_entry aggressivenes[16];
+} __packed;
+
+/*
* Block 52 - MIPI Configuration Block
*/