diff options
| author | Dave Airlie <airlied@redhat.com> | 2021-04-08 14:02:14 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2021-04-08 14:02:21 +1000 |
| commit | 9c0fed84d5750e1eea6c664e073ffa2534a17743 (patch) | |
| tree | 19fd185bfceddc79ca7c9eaff670a24e35da7216 /drivers/gpu/drm/i915/display/intel_vdsc.c | |
| parent | 41d1d0c51f5ffd5c2c35e82e4a675b185cccea13 (diff) | |
| parent | 81f1f8f1e1489c0bf051d5241ec10da07869b911 (diff) | |
Merge tag 'drm-intel-next-2021-04-01' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Features:
- Add support for FBs requiring a power-of-two stride padding (Imre)
Refactoring:
- Disassociate display version from gen (Matt)
- Refactor legacy DP and HDMI code to separate files (Ville)
- Refactor FB plane code to a separate file (Imre)
- Refactor VBT child device info parsing and usage (Jani)
- Refactor KBL/TGL/ADL-S display and gt stepping schemes (Jani)
Fixes:
- DP Link-Training Tunable PHY Repeaters (LTTPR) fixes (Imre)
- HDCP fixes (Anshuman)
- DP 2.0 HDMI 2.1 PCON Fixed Rate Link (FRL) fixes (Ankit)
- Set HDA link parameters in driver (Kai)
- Fix enabled_planes bitmask (Ville)
- Fix transposed arguments to skl_plane_wm_level() (Ville)
- Stop adding planes to the commit needlessly (Ville)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87v996ml17.fsf@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_vdsc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_vdsc.c | 22 |
1 files changed, 6 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index f58cc5700784..3a21c65ffa85 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -343,14 +343,10 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) return false; /* On TGL, DSC is supported on all Pipes */ - if (INTEL_GEN(i915) >= 12) + if (DISPLAY_VER(i915) >= 12) return true; - if (INTEL_GEN(i915) >= 10 && - (pipe != PIPE_A || - (cpu_transcoder == TRANSCODER_EDP || - cpu_transcoder == TRANSCODER_DSI_0 || - cpu_transcoder == TRANSCODER_DSI_1))) + if ((DISPLAY_VER(i915) >= 11 || IS_CANNONLAKE(i915)) && (pipe != PIPE_A || (cpu_transcoder == TRANSCODER_EDP || cpu_transcoder == TRANSCODER_DSI_0 || cpu_transcoder == TRANSCODER_DSI_1))) return true; return false; @@ -362,7 +358,7 @@ static bool is_pipe_dsc(const struct intel_crtc_state *crtc_state) const struct drm_i915_private *i915 = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (INTEL_GEN(i915) >= 12) + if (DISPLAY_VER(i915) >= 12) return true; if (cpu_transcoder == TRANSCODER_EDP || @@ -479,7 +475,7 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state) * the pipe in use. Hence another reference on the pipe power domain * will suffice. (Except no VDSC/joining on ICL pipe A.) */ - if (INTEL_GEN(i915) >= 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A) + if (DISPLAY_VER(i915) >= 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A) return POWER_DOMAIN_TRANSCODER_VDSC_PW2; else if (is_pipe_dsc(crtc_state)) return POWER_DOMAIN_PIPE(pipe); @@ -1014,20 +1010,14 @@ static i915_reg_t dss_ctl1_reg(const struct intel_crtc_state *crtc_state) { enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; - if (crtc_state->cpu_transcoder == TRANSCODER_EDP) - return DSS_CTL1; - - return ICL_PIPE_DSS_CTL1(pipe); + return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL1(pipe) : DSS_CTL1; } static i915_reg_t dss_ctl2_reg(const struct intel_crtc_state *crtc_state) { enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; - if (crtc_state->cpu_transcoder == TRANSCODER_EDP) - return DSS_CTL2; - - return ICL_PIPE_DSS_CTL2(pipe); + return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL2(pipe) : DSS_CTL2; } void intel_dsc_enable(struct intel_encoder *encoder, |