Merge tag 'drm-fixes-2022-09-10' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "From a train in the Irish countryside, regular drm fixes for 6.0-rc5.

  This is mostly amdgpu/amdkfd and i915 fixes, then one panfrost, one
  ttm and one edid fix. Nothing too major going on. Hopefully a quiet
  week next week for LPC.

  edid:
   - Fix EDID 1.4 range-descriptor parsing

  ttm:
   - Fix ghost-object bulk moves

  i915:
   - Fix MIPI sequence block copy from BIOS' table
   - Fix PCODE min freq setup when GuC's SLPC is in use
   - Implement Workaround for eDP
   - Fix has_flat_ccs selection for DG1

  amdgpu:
   - Firmware header fix
   - SMU 13.x fix
   - Debugfs memory leak fix
   - NBIO 7.7 fix
   - Firmware memory leak fix

  amdkfd:
   - Debug output fix

  panfrost:
   - Fix devfreq OPP"

* tag 'drm-fixes-2022-09-10' of git://anongit.freedesktop.org/drm/drm:
  drm/panfrost: devfreq: set opp to the recommended one to configure regulator
  drm/ttm: cleanup the resource of ghost objects after locking them
  drm/amdgpu: prevent toc firmware memory leak
  drm/amdgpu: correct doorbell range/size value for CSDMA_DOORBELL_RANGE
  drm/amdkfd: print address in hex format rather than decimal
  drm/amd/display: fix memory leak when using debugfs_lookup()
  drm/amd/pm: add missing SetMGpuFanBoostLimitRpm mapping for SMU 13.0.7
  drm/amd/amdgpu: add rlc_firmware_header_v2_4 to amdgpu_firmware_header
  drm/i915: consider HAS_FLAT_CCS() in needs_ccs_pages
  drm/i915: Implement WaEdpLinkRateDataReload
  drm/i915/slpc: Let's fix the PCODE min freq table setup for SLPC
  drm/i915/bios: Copy the whole MIPI sequence block
  drm/ttm: update bulk move object of ghost BO
  drm/edid: Handle EDID 1.4 range descriptor h/vfreq offsets

2 files changed, 29 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 198a2f4920cc..7d6eb9ad7a02 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -479,6 +479,13 @@ init_bdb_block(struct drm_i915_private *i915,
 
 	block_size = get_blocksize(block);
 
+	/*
+	 * Version number and new block size are considered
+	 * part of the header for MIPI sequenece block v3+.
+	 */
+	if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
+		block_size += 5;
+
 	entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
 			GFP_KERNEL);
 	if (!entry) {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 9feaf1a589f3..d213d8ad1ea5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -671,6 +671,28 @@ intel_dp_prepare_link_train(struct intel_dp *intel_dp,
 	intel_dp_compute_rate(intel_dp, crtc_state->port_clock,
 			      &link_bw, &rate_select);
 
+	/*
+	 * WaEdpLinkRateDataReload
+	 *
+	 * Parade PS8461E MUX (used on varius TGL+ laptops) needs
+	 * to snoop the link rates reported by the sink when we
+	 * use LINK_RATE_SET in order to operate in jitter cleaning
+	 * mode (as opposed to redriver mode). Unfortunately it
+	 * loses track of the snooped link rates when powered down,
+	 * so we need to make it re-snoop often. Without this high
+	 * link rates are not stable.
+	 */
+	if (!link_bw) {
+		struct intel_connector *connector = intel_dp->attached_connector;
+		__le16 sink_rates[DP_MAX_SUPPORTED_RATES];
+
+		drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Reloading eDP link rates\n",
+			    connector->base.base.id, connector->base.name);
+
+		drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES,
+				 sink_rates, sizeof(sink_rates));
+	}
+
 	if (link_bw)
 		drm_dbg_kms(&i915->drm,
 			    "[ENCODER:%d:%s] Using LINK_BW_SET value %02x\n",