diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-10 02:47:53 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-10 17:03:45 +0200 |
| commit | b395c29add3c8b8966789c4642bac164943fc044 (patch) | |
| tree | d0024cdc493cd26db681655ea33c619d5a5f6f60 /drivers/gpu/drm/i915/display | |
| parent | 5f6a9bea163711dd544d6ba93e18bbb847eb8e12 (diff) | |
drm/i915: Read DRRS MSA timing delay from VBT
VBT hsa a field for the MSA timing delay, which supposedly
should be used with DRRS. Extract the data from the VBT.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220310004802.16310-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bios.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index a559a1914588..93dc32fb3e40 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -888,6 +888,9 @@ parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb) i915->vbt.edp.low_vswing = vswing == 0; } } + + i915->vbt.edp.drrs_msa_timing_delay = + (edp->sdrrs_msa_timing_delay >> (panel_type * 2)) & 3; } static void |