diff options
author | Dave Airlie <airlied@redhat.com> | 2019-12-27 15:25:04 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2019-12-27 15:25:04 +1000 |
commit | 3ae3271443b337c1cd421a9b73d51c5c2de52977 (patch) | |
tree | 2ce6c36149f45e50af5b3c321fa2b5222f9b81ae /drivers/gpu/drm/i915/gem/i915_gem_object_types.h | |
parent | 5f773e551a3b977013df24d570d486645f326672 (diff) | |
parent | 3446c63a0f2a691fdc6fffaddc6e0c1285efc80c (diff) |
Merge tag 'drm-intel-next-2019-12-23' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
i915 features for v5.6:
- Separate hardware and uapi state (Maarten)
- Expose a number of sprite and plane formats (Ville)
- DDC symlink in HDMI connector sysfs directory (Andrzej Pietrasiewicz)
- Improve obj->mm.lock nesting lock annotation (Daniel)
(Includes lockdep changes)
- Selftest improvements across the board (Chris)
- ICL/TGL VDSC support on DSI (Jani, Vandita)
- TGL DSB fixes (Animesh, Lucas, Tvrtko)
- VBT parsing improvements and fixes (Lucas, Matt, José, Jani, Dan Carpenter)
- Fix LPSS vs. PMIC PWM backlight use on BYT/CHT (Hans)
(Includes ACPI+MFD changes)
- Display state, crtc, plane code refactoring (Ville)
- Set opregion chpd value to indicate the driver handles hotplug (Hans de Goede)
- DSI updates and fixes, TGL pipe D support, port mapping (José, Jani, Vandita)
- Make HDCP 2.2 support cover CFL (Juston Li)
- Fix CML PCI IDs and ULT (Shawn Lee)
- CMP-V PCH fix (Imre)
- TGL: Add another TGL PCH ID (James)
- EHL/JSL: Add new PCI IDs (James)
- Rename pipe update tracepoints (Ville)
- Fix FBC on GLK+ (Ville)
- GuC fixes and improvements (Daniele, Don Hiatt, Stuart Summers, Matthew Brost)
- Display debugfs improvements (Ville)
- Hotplug/irq fixes (Matt)
- PSR fixes and improvements (José)
- DRM_I915_GEM_MMAP_OFFSET ioctl (Abdiel)
- Static analysis fixes (Colin Ian King)
- Register sysctl path globally (Venkata Sandeep Dhanalakota)
- Introduce new macros for tracing (Venkata Sandeep Dhanalakota)
- Migrate gt towards intel_uncore_read/write (Andi)
- Add rps frequency translation helpers (Andi)
- Fix TGL transcoder clock off sequence (José)
- Fix TGL port A audio (Kai Vehmanen)
- TGL render decompression (DK)
- GEM/GT improvements and fixes across the board (Chris)
- Couple of backmerges (Jani)
Signed-off-by: Dave Airlie <airlied@redhat.com>
# gpg: Signature made Tue 24 Dec 2019 03:20:48 AM AEST
# gpg: using RSA key D398079D26ABEE6F
# gpg: Good signature from "Jani Nikula <jani.nikula@intel.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 1565 A65B 77B0 632E 1124 E59C D398 079D 26AB EE6F
# Conflicts:
# drivers/gpu/drm/i915/display/intel_fbc.c
# drivers/gpu/drm/i915/gt/intel_lrc.c
# drivers/gpu/drm/i915/i915_gem.c
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87lfr3rkry.fsf@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gem/i915_gem_object_types.h')
-rw-r--r-- | drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 31 |
1 files changed, 29 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h index 96008374a412..88e268633fdc 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h @@ -63,6 +63,23 @@ struct drm_i915_gem_object_ops { void (*release)(struct drm_i915_gem_object *obj); }; +enum i915_mmap_type { + I915_MMAP_TYPE_GTT = 0, + I915_MMAP_TYPE_WC, + I915_MMAP_TYPE_WB, + I915_MMAP_TYPE_UC, +}; + +struct i915_mmap_offset { + struct drm_device *dev; + struct drm_vma_offset_node vma_node; + struct drm_i915_gem_object *obj; + struct drm_file *file; + enum i915_mmap_type mmap_type; + + struct list_head offset; +}; + struct drm_i915_gem_object { struct drm_gem_object base; @@ -118,12 +135,18 @@ struct drm_i915_gem_object { unsigned int userfault_count; struct list_head userfault_link; + struct { + spinlock_t lock; /* Protects access to mmo offsets */ + struct list_head offsets; + } mmo; + I915_SELFTEST_DECLARE(struct list_head st_link); unsigned long flags; #define I915_BO_ALLOC_CONTIGUOUS BIT(0) #define I915_BO_ALLOC_VOLATILE BIT(1) #define I915_BO_ALLOC_FLAGS (I915_BO_ALLOC_CONTIGUOUS | I915_BO_ALLOC_VOLATILE) +#define I915_BO_READONLY BIT(2) /* * Is the object to be mapped as read-only to the GPU @@ -150,7 +173,7 @@ struct drm_i915_gem_object { */ u16 write_domain; - struct intel_frontbuffer *frontbuffer; + struct intel_frontbuffer __rcu *frontbuffer; /** Current tiling stride for the object, if it's tiled. */ unsigned int tiling_and_stride; @@ -162,7 +185,11 @@ struct drm_i915_gem_object { atomic_t bind_count; struct { - struct mutex lock; /* protects the pages and their use */ + /* + * Protects the pages and their use. Do not use directly, but + * instead go through the pin/unpin interfaces. + */ + struct mutex lock; atomic_t pages_pin_count; atomic_t shrink_pin; |