diff options
| author | Rahul Kumar Singh <rahul.kumar.singh@intel.com> | 2021-07-26 17:23:42 -0700 |
|---|---|---|
| committer | John Harrison <John.C.Harrison@Intel.com> | 2021-07-27 17:32:18 -0700 |
| commit | 3a4bfa091c46e90f7d68d219c36a86471b170cb8 (patch) | |
| tree | 272c7a9abb967e392e808d30138c1ac300803e07 /drivers/gpu/drm/i915/gt/intel_engine_types.h | |
| parent | 3f5dff6c18aa0473158686f363184a1bdae0116b (diff) | |
drm/i915/selftest: Fix workarounds selftest for GuC submission
When GuC submission is enabled, the GuC controls engine resets. Rather
than explicitly triggering a reset, the driver must submit a hanging
context to GuC and wait for the reset to occur.
Signed-off-by: Rahul Kumar Singh <rahul.kumar.singh@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210727002348.97202-28-matthew.brost@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_engine_types.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h index 260cce15cb62..ed91bcff20eb 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h @@ -443,6 +443,7 @@ struct intel_engine_cs { #define I915_ENGINE_IS_VIRTUAL BIT(5) #define I915_ENGINE_HAS_RELATIVE_MMIO BIT(6) #define I915_ENGINE_REQUIRES_CMD_PARSER BIT(7) +#define I915_ENGINE_WANT_FORCED_PREEMPTION BIT(8) unsigned int flags; /* |