diff options
| author | Michael Cheng <michael.cheng@intel.com> | 2022-03-21 15:38:19 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-03-22 10:10:53 -0700 |
| commit | 61c5ed946da28e45edc3470e8d9f4da19cb15c8d (patch) | |
| tree | 0b587d7d405c8c84add1535d33a3e1ba3cd8e96e /drivers/gpu/drm/i915/gt/intel_ppgtt.c | |
| parent | 89754df82f1565f2223293c0a0062b779a33d136 (diff) | |
drm/i915/gt: replace cache_clflush_range
Replace all occurrence of cache_clflush_range with drm_clflush_virt_range.
This will prevent compile errors on non-x86 platforms.
Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220321223819.72833-6-michael.cheng@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_ppgtt.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_ppgtt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_ppgtt.c b/drivers/gpu/drm/i915/gt/intel_ppgtt.c index d91e2beb7517..d8b94d638559 100644 --- a/drivers/gpu/drm/i915/gt/intel_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ppgtt.c @@ -91,7 +91,7 @@ write_dma_entry(struct drm_i915_gem_object * const pdma, u64 * const vaddr = __px_vaddr(pdma); vaddr[idx] = encoded_entry; - clflush_cache_range(&vaddr[idx], sizeof(u64)); + drm_clflush_virt_range(&vaddr[idx], sizeof(u64)); } void |