diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-10 18:01:11 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-11 21:34:35 +0000 |
| commit | 972745fd577044ea153ec6d7899dcf9bb3c806e5 (patch) | |
| tree | 81daffb9a6d9be2bfa2454093f77ef02aa12cf5e /drivers/gpu/drm/i915/gt/intel_rc6.c | |
| parent | 220a9d45c6709127cd56430caef07034f1ec5030 (diff) | |
drm/i915/gt: Disable manual rc6 for Braswell/Baytrail
The initial investigated showed that while the PCU on Braswell/Baytrail
controlled RC6 itself. setting the software RC6 request made no
difference. Further testing reveals though that it causes a delay in the
PCU on enabling RC6.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/763
Fixes: 730eaeb52426 ("drm/i915/gt: Manual rc6 entry upon parking")
Testcase: igt/perf/rc6-disable
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Acked-by: Andi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191210180111.3958558-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_rc6.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_rc6.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c index 4dc82196b285..8ec2b7725141 100644 --- a/drivers/gpu/drm/i915/gt/intel_rc6.c +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c @@ -612,6 +612,9 @@ void intel_rc6_park(struct intel_rc6 *rc6) return; } + if (!(rc6->ctl_enable & GEN6_RC_CTL_RC6_ENABLE)) + return; + /* Turn off the HW timers and go directly to rc6 */ set(uncore, GEN6_RC_CONTROL, GEN6_RC_CTL_RC6_ENABLE); set(uncore, GEN6_RC_STATE, 0x4 << RC_SW_TARGET_STATE_SHIFT); |