diff options
| author | Stuart Summers <stuart.summers@intel.com> | 2019-08-23 09:03:00 -0700 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-08-23 19:14:22 +0100 |
| commit | 49610c377be7f32d948f0970705b4ad015923aa0 (patch) | |
| tree | 6e491b6d5f8273530985b44925982e64c18e195b /drivers/gpu/drm/i915/gt/intel_sseu.h | |
| parent | 7a200aad1127e98cbf4da9685f652899598fe357 (diff) | |
drm/i915: Add EU stride runtime parameter
Add a new SSEU runtime parameter, eu_stride, which is
used to mirror the userspace concept of a range of EUs
per subslice.
This patch simply adds the parameter and updates usage
in the QUERY_TOPOLOGY_INFO handler.
v2: Add GEM_BUG_ON to make sure eu_stride is valid
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823160307.180813-5-stuart.summers@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_sseu.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_sseu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h index 8b8b562ff773..7f2355ce963d 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.h +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h @@ -16,6 +16,8 @@ struct drm_i915_private; #define GEN_MAX_SUBSLICES (8) /* ICL upper bound */ #define GEN_SSEU_STRIDE(max_entries) DIV_ROUND_UP(max_entries, BITS_PER_BYTE) #define GEN_MAX_SUBSLICE_STRIDE GEN_SSEU_STRIDE(GEN_MAX_SUBSLICES) +#define GEN_MAX_EUS (10) /* HSW upper bound */ +#define GEN_MAX_EU_STRIDE GEN_SSEU_STRIDE(GEN_MAX_EUS) struct sseu_dev_info { u8 slice_mask; @@ -35,6 +37,7 @@ struct sseu_dev_info { u8 max_eus_per_subslice; u8 ss_stride; + u8 eu_stride; /* We don't have more than 8 eus per subslice at the moment and as we * store eus enabled using bits, no need to multiply by eus per |