diff options
| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-07-28 15:03:24 -0700 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-07-29 10:06:08 -0700 |
| commit | 91a197e4e140dcf2a525a43348b87378c9c3a234 (patch) | |
| tree | 490b5da6d46b5d19e053a044eac7840c8351d130 /drivers/gpu/drm/i915/gt/intel_sseu.h | |
| parent | 94fd8400c2a37e88f6f82ef1553bf6336b8569b1 (diff) | |
drm/i915/gt: remove explicit CNL handling from intel_sseu.c
CNL is the only platform with GRAPHICS_VER == 10. With its removal we
don't need to handle that version anymore.
Also we can now reduce the max number of slices: the call to
intel_sseu_set_info() with the highest number of slices comes from SKL
and BDW with 3 slices. Recent platforms actually increase the
number of subslices so the number of slices remain 1.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210728220326.1578242-3-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_sseu.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_sseu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h index 4cd1a8a7298a..8d85ec05f610 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.h +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h @@ -15,7 +15,7 @@ struct drm_i915_private; struct intel_gt; struct drm_printer; -#define GEN_MAX_SLICES (6) /* CNL upper bound */ +#define GEN_MAX_SLICES (3) /* SKL upper bound */ #define GEN_MAX_SUBSLICES (8) /* ICL upper bound */ #define GEN_SSEU_STRIDE(max_entries) DIV_ROUND_UP(max_entries, BITS_PER_BYTE) #define GEN_MAX_SUBSLICE_STRIDE GEN_SSEU_STRIDE(GEN_MAX_SUBSLICES) |