diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2020-02-03 09:41:49 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-02-03 11:27:17 +0000 |
| commit | 8faa72511bb844fc1079aaebe786580205d27d86 (patch) | |
| tree | 4807bf82a450a3f1233aeaba09c6d2f6527cdee4 /drivers/gpu/drm/i915/gt/intel_timeline.c | |
| parent | 855e39e65cfc33a73724f1cc644ffc5754864a20 (diff) | |
drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno
On seqno rollover, we need to allocate ourselves a new cacheline. This
might incur grabbing a new page and pinning it into the GGTT, with some
rather unfortunate lockdep implications.
To avoid a mutex, and more specifically pinning in the GGTT from inside
the kernel context being used to flush the GGTT in emergencies, we will
likely need to lift the next-cacheline allocation to a pre-reservation.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200203094152.4150550-3-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_timeline.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_timeline.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c index 465f87b65901..54e1e55f3c81 100644 --- a/drivers/gpu/drm/i915/gt/intel_timeline.c +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c @@ -406,6 +406,8 @@ __intel_timeline_get_seqno(struct intel_timeline *tl, void *vaddr; int err; + might_lock(&tl->gt->ggtt->vm.mutex); + /* * If there is an outstanding GPU reference to this cacheline, * such as it being sampled by a HW semaphore on another timeline, |