diff options
author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-06-30 13:35:08 -0700 |
---|---|---|
committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-07-03 11:30:25 -0700 |
commit | 03286f948065d68194f5654373a9017a484d364a (patch) | |
tree | 9f421e08f72906c63578b087b6cbd9361f580b19 /drivers/gpu/drm/i915/gt/intel_workarounds.c | |
parent | 9a54a7c3f3fb5f1849355556172fd3e48a5d72f2 (diff) |
drm/i915/gt: Remove bogus comment on IVB_FBC_RT_BASE_UPPER
The comment on the parameter being 0 to avoid the read back doesn't
apply as this is not a call to wa_add(), but rather to
wa_write_clr_set(). So, this register is actually checked and it's
according to the Bspec that the register is RW, not RO.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230630203509.1635216-7-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_workarounds.c')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index e2025c363949..a6f3f160ebe2 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -666,7 +666,7 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine, /* Wa_1604278689:icl,ehl */ wa_write(wal, IVB_FBC_RT_BASE, 0xFFFFFFFF & ~ILK_FBC_RT_VALID); wa_write_clr_set(wal, IVB_FBC_RT_BASE_UPPER, - 0, /* write-only register; skip validation */ + 0, 0xFFFFFFFF); /* Wa_1406306137:icl,ehl */ |