diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2020-01-31 23:50:35 +0000 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-02-01 09:21:57 +0000 |
commit | eeec73f8a4a4d27a1e7be3dedc4b9c81e42ccc0b (patch) | |
tree | 03d8f5fdd82a6c54617b9242865997754fcac9b7 /drivers/gpu/drm/i915/gt/intel_workarounds_types.h | |
parent | faea1792835d5608c6b4275b2c124ca3e754346e (diff) |
drm/i915/gt: Skip rmw for masked registers
A masked register does not need rmw to update, and it is best not to use
such a sequence.
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200131235035.3522102-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_workarounds_types.h')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_workarounds_types.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h index e27ab1b710b3..d166a7145720 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h @@ -13,8 +13,8 @@ struct i915_wa { i915_reg_t reg; - u32 mask; - u32 val; + u32 clr; + u32 set; u32 read; }; |