summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/gt/selftest_reset.c
diff options
context:
space:
mode:
authorMichal Wajdeczko <michal.wajdeczko@intel.com>2019-05-22 19:31:56 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2019-05-23 21:53:26 +0100
commitf6470c9bccab9b8b6a2c6669fc7b18a48a56c42c (patch)
tree57e779ca5b85049192dfc6e6f33d0ed28a74e3bc /drivers/gpu/drm/i915/gt/selftest_reset.c
parent932309fb030d82943941ccb3756e7c59fbc0189e (diff)
drm/i915/selftests: Split igt_atomic_reset testcase
Split igt_atomic_reset selftests into separate full & engines parts, so we can move former to the dedicated reset selftests file. While here change engines test to loop first over atomic phases and then loop over available engines. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190522193203.23932-3-michal.wajdeczko@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/selftest_reset.c')
-rw-r--r--drivers/gpu/drm/i915/gt/selftest_reset.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
index ef90101bb87a..4560ed2751a4 100644
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -5,6 +5,7 @@
#include "i915_selftest.h"
#include "selftests/igt_reset.h"
+#include "selftests/igt_atomic.h"
static int igt_global_reset(void *arg)
{
@@ -54,11 +55,50 @@ static int igt_wedged_reset(void *arg)
return i915_reset_failed(i915) ? -EIO : 0;
}
+static int igt_atomic_reset(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ const typeof(*igt_atomic_phases) *p;
+ int err = 0;
+
+ /* Check that the resets are usable from atomic context */
+
+ igt_global_reset_lock(i915);
+ mutex_lock(&i915->drm.struct_mutex);
+
+ /* Flush any requests before we get started and check basics */
+ if (!igt_force_reset(i915))
+ goto unlock;
+
+ for (p = igt_atomic_phases; p->name; p++) {
+ GEM_TRACE("intel_gpu_reset under %s\n", p->name);
+
+ p->critical_section_begin();
+ err = intel_gpu_reset(i915, ALL_ENGINES);
+ p->critical_section_end();
+
+ if (err) {
+ pr_err("intel_gpu_reset failed under %s\n", p->name);
+ break;
+ }
+ }
+
+ /* As we poke around the guts, do a full reset before continuing. */
+ igt_force_reset(i915);
+
+unlock:
+ mutex_unlock(&i915->drm.struct_mutex);
+ igt_global_reset_unlock(i915);
+
+ return err;
+}
+
int intel_reset_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(igt_global_reset), /* attempt to recover GPU first */
SUBTEST(igt_wedged_reset),
+ SUBTEST(igt_atomic_reset),
};
intel_wakeref_t wakeref;
int err = 0;