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authorZhenyu Wang <zhenyuw@linux.intel.com>2016-12-27 14:49:14 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2017-02-07 17:21:55 +0800
commit144730256f7a3a8b4cae0150852d0ac3be1a676b (patch)
treeb2d09533d3b3b45cdae4ace864e94c04a810b867 /drivers/gpu/drm/i915/gvt/firmware.c
parent3de49a7314c9e17d71e97af4ed4b0564609e9ba7 (diff)
drm/i915/gvt: use normal mmio read function for firmware exposure
As now gvt init is late after MMIO initialization, use normal MMIO read function for initial firmware exposure if no available firmware loaded. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/firmware.c')
-rw-r--r--drivers/gpu/drm/i915/gvt/firmware.c47
1 files changed, 4 insertions, 43 deletions
diff --git a/drivers/gpu/drm/i915/gvt/firmware.c b/drivers/gpu/drm/i915/gvt/firmware.c
index 2fae2a2ca96f..1cb29b2d7dc6 100644
--- a/drivers/gpu/drm/i915/gvt/firmware.c
+++ b/drivers/gpu/drm/i915/gvt/firmware.c
@@ -48,31 +48,6 @@ struct gvt_firmware_header {
unsigned char data[1];
};
-#define RD(offset) (readl(mmio + offset.reg))
-#define WR(v, offset) (writel(v, mmio + offset.reg))
-
-static void bdw_forcewake_get(void __iomem *mmio)
-{
- WR(_MASKED_BIT_DISABLE(0xffff), FORCEWAKE_MT);
-
- RD(ECOBUS);
-
- if (wait_for((RD(FORCEWAKE_ACK_HSW) & FORCEWAKE_KERNEL) == 0, 50))
- gvt_err("fail to wait forcewake idle\n");
-
- WR(_MASKED_BIT_ENABLE(FORCEWAKE_KERNEL), FORCEWAKE_MT);
-
- if (wait_for((RD(FORCEWAKE_ACK_HSW) & FORCEWAKE_KERNEL), 50))
- gvt_err("fail to wait forcewake ack\n");
-
- if (wait_for((RD(GEN6_GT_THREAD_STATUS_REG) &
- GEN6_GT_THREAD_STATUS_CORE_MASK) == 0, 50))
- gvt_err("fail to wait c0 wake up\n");
-}
-
-#undef RD
-#undef WR
-
#define dev_to_drm_minor(d) dev_get_drvdata((d))
static ssize_t
@@ -91,9 +66,9 @@ static struct bin_attribute firmware_attr = {
.mmap = NULL,
};
-static int expose_firmware_sysfs(struct intel_gvt *gvt,
- void __iomem *mmio)
+static int expose_firmware_sysfs(struct intel_gvt *gvt)
{
+ struct drm_i915_private *dev_priv = gvt->dev_priv;
struct intel_gvt_device_info *info = &gvt->device_info;
struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
struct intel_gvt_mmio_info *e;
@@ -132,7 +107,7 @@ static int expose_firmware_sysfs(struct intel_gvt *gvt,
for (j = 0; j < e->length; j += 4)
*(u32 *)(p + e->offset + j) =
- readl(mmio + e->offset + j);
+ I915_READ_NOTRACE(_MMIO(e->offset + j));
}
memcpy(gvt->firmware.mmio, p, info->mmio_size);
@@ -235,7 +210,6 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt)
struct gvt_firmware_header *h;
const struct firmware *fw;
char *path;
- void __iomem *mmio;
void *mem;
int ret;
@@ -260,17 +234,6 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt)
firmware->mmio = mem;
- mmio = pci_iomap(pdev, info->mmio_bar, info->mmio_size);
- if (!mmio) {
- kfree(path);
- kfree(firmware->cfg_space);
- kfree(firmware->mmio);
- return -EINVAL;
- }
-
- if (IS_BROADWELL(gvt->dev_priv) || IS_SKYLAKE(gvt->dev_priv))
- bdw_forcewake_get(mmio);
-
sprintf(path, "%s/vid_0x%04x_did_0x%04x_rid_0x%04x.golden_hw_state",
GVT_FIRMWARE_PATH, pdev->vendor, pdev->device,
pdev->revision);
@@ -300,13 +263,11 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt)
release_firmware(fw);
firmware->firmware_loaded = true;
- pci_iounmap(pdev, mmio);
return 0;
out_free_fw:
release_firmware(fw);
expose_firmware:
- expose_firmware_sysfs(gvt, mmio);
- pci_iounmap(pdev, mmio);
+ expose_firmware_sysfs(gvt);
return 0;
}