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authorColin Ian King <colin.king@canonical.com>2017-12-04 17:21:06 +0000
committerZhenyu Wang <zhenyuw@linux.intel.com>2017-12-05 11:45:06 +0800
commit8e60b7f195d2536b2f090ae97f74ed19a504d60c (patch)
tree99f658fc76da1f6404dbdc9a529ccf11bd7a0906 /drivers/gpu/drm/i915/gvt/handlers.c
parentf745e9cc7e40c4570ab5e8d5ef32bfaa6e8ced46 (diff)
drm/i915/gvt: fix off-by-one comparison of ring_id
The ring_id maximum boundary is being compared using the > operator instead of >=, leading to an off-by-one error and an out of bounds write into array vgpu->hws_pga[]. Fix this by simply using the correct comparison operator. Also re-work another comparison that uses the comparison > I915_NUM_ENGINES - 1 to use the >= idiom using to keep this consistent in this code. Detected by CoverityScan, CID#1462404 ("Out-of-bounds write") Fixes: a2ae95af9646 ("drm/i915/gvt: update CSB and CSB write pointer in virtual HWSP") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/handlers.c')
-rw-r--r--drivers/gpu/drm/i915/gvt/handlers.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 54f5eac8bcc3..6f95bc04f0f0 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1398,7 +1398,7 @@ static int hws_pga_write(struct intel_vgpu *vgpu, unsigned int offset,
* update the VM CSB status correctly. Here listed registers can
* support BDW, SKL or other platforms with same HWSP registers.
*/
- if (unlikely(ring_id < 0 || ring_id > I915_NUM_ENGINES)) {
+ if (unlikely(ring_id < 0 || ring_id >= I915_NUM_ENGINES)) {
gvt_vgpu_err("VM(%d) access unknown hardware status page register:0x%x\n",
vgpu->id, offset);
return -EINVAL;
@@ -1507,7 +1507,7 @@ static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
u32 data = *(u32 *)p_data;
int ret = 0;
- if (WARN_ON(ring_id < 0 || ring_id > I915_NUM_ENGINES - 1))
+ if (WARN_ON(ring_id < 0 || ring_id >= I915_NUM_ENGINES))
return -EINVAL;
execlist = &vgpu->submission.execlist[ring_id];