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authorChangbin Du <changbin.du@intel.com>2018-01-30 19:19:40 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2018-03-06 13:19:13 +0800
commitede9d0cfcb789b6fd86ecb71b4721a19c53956e6 (patch)
treefa844b6b6c549c0d7b342cc7fed4e3777f520a80 /drivers/gpu/drm/i915/gvt/handlers.c
parent1f267a572b573b0b155022750cba93001f4367a8 (diff)
drm/i915/gvt: Rework shadow graphic memory management code
This is a big one and the GVT shadow graphic memory management code is heavily refined. The new code is more straightforward with less code. The struct intel_vgpu_mm is restructured to be clearly defined, use accurate names and some of the original fields are removed which are really redundant. Now we only manage ppgtt mm object with mm->ppgtt_mm.lru_list. No need to mix ppgtt and ggtt together, since one vGPU only has one ggtt object. v4: Don't invoke ppgtt_free_all_shadow_page before intel_vgpu_destroy_all_ppgtt_mm. v3: Add GVT_RING_CTX_NR_PDPS to avoid confusing about the PDPs. v2: Split some changes into small standalone patches. Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/handlers.c')
-rw-r--r--drivers/gpu/drm/i915/gvt/handlers.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 9be639aa3b55..c51a5bd4e109 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1139,20 +1139,27 @@ static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification)
{
+ u64 *pdps;
int ret = 0;
+ pdps = (u64 *)&vgpu_vreg64_t(vgpu, vgtif_reg(pdp[0]));
+
switch (notification) {
case VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE:
- ret = intel_vgpu_g2v_create_ppgtt_mm(vgpu, 3);
+ ret = intel_vgpu_g2v_create_ppgtt_mm(vgpu,
+ GTT_TYPE_PPGTT_ROOT_L3_ENTRY,
+ pdps);
break;
case VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY:
- ret = intel_vgpu_g2v_destroy_ppgtt_mm(vgpu, 3);
+ ret = intel_vgpu_g2v_destroy_ppgtt_mm(vgpu, pdps);
break;
case VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE:
- ret = intel_vgpu_g2v_create_ppgtt_mm(vgpu, 4);
+ ret = intel_vgpu_g2v_create_ppgtt_mm(vgpu,
+ GTT_TYPE_PPGTT_ROOT_L4_ENTRY,
+ pdps);
break;
case VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY:
- ret = intel_vgpu_g2v_destroy_ppgtt_mm(vgpu, 4);
+ ret = intel_vgpu_g2v_destroy_ppgtt_mm(vgpu, pdps);
break;
case VGT_G2V_EXECLIST_CONTEXT_CREATE:
case VGT_G2V_EXECLIST_CONTEXT_DESTROY: