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authorChris Wilson <chris@chris-wilson.co.uk>2017-04-05 16:30:54 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2017-04-07 10:10:13 +0100
commit2ca9faa551c4c97610bb0209e20c7231a93712ff (patch)
tree2b3430273a44ee92ceb7efdb81e5a30c7f5fa9aa /drivers/gpu/drm/i915/i915_gem_request.c
parentdb5ba0d8931ee0e470805b972a905c869dc793bb (diff)
drm/i915: Assert the engine is idle before overwiting the HWS
When we update the global seqno (on the engine timeline), we modify HW state (both registers and mapped pages). As we do this, we should be sure that the HW is idle and we are not causing a conflict. The caller is supposed to wait_for_idle before calling us to update the seqno, so let's assert they have and the engine is indeed idle. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/20170405153055.28123-1-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_request.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_request.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index 6348353b91ec..2f8c5132b54e 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -214,8 +214,8 @@ static int reset_all_global_seqno(struct drm_i915_private *i915, u32 seqno)
}
/* Finally reset hw state */
- tl->seqno = seqno;
intel_engine_init_global_seqno(engine, seqno);
+ tl->seqno = seqno;
list_for_each_entry(timeline, &i915->gt.timelines, link)
memset(timeline->engine[id].sync_seqno, 0,