diff options
| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-07-28 14:59:23 -0700 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-07-30 10:11:21 -0700 |
| commit | 1d89509a5dd64ccd3abba8861c909b3707eb7520 (patch) | |
| tree | 922c093f5a6110ea21265c9162fd2647a8c0af7c /drivers/gpu/drm/i915/i915_reg.h | |
| parent | cad83b405fe482a132ff5163ad0775c22411e3f7 (diff) | |
drm/i915/display: remove explicit CNL handling from intel_cdclk.c
The only real platform with DISPLAY_VER == 10 is GLK, so we don't need
any checks and supporting code for CNL. Remove code and rename
functions/macros accordingly.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210728215946.1573015-3-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 51301fa9da14..5ea2a8c6acba 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -11086,8 +11086,8 @@ enum skl_power_gate { #define BXT_DE_PLL_LOCK (1 << 30) #define BXT_DE_PLL_FREQ_REQ (1 << 23) #define BXT_DE_PLL_FREQ_REQ_ACK (1 << 22) -#define CNL_CDCLK_PLL_RATIO(x) (x) -#define CNL_CDCLK_PLL_RATIO_MASK 0xff +#define ICL_CDCLK_PLL_RATIO(x) (x) +#define ICL_CDCLK_PLL_RATIO_MASK 0xff /* GEN9 DC */ #define DC_STATE_EN _MMIO(0x45504) |