summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_vgpu.h
diff options
context:
space:
mode:
authorWeinan Li <weinan.z.li@intel.com>2017-10-15 11:55:25 +0800
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>2017-10-16 13:56:29 +0300
commit1fd51d9d97059cb7dd0bf7a3b6f7cb609d485718 (patch)
tree068c79a5d64e2c9cb61b362b220cbdab692b217e /drivers/gpu/drm/i915/i915_vgpu.h
parent1210d3889077653b90b0bfd2cc54e19f4766e4e6 (diff)
drm/i915: enable to read CSB and CSB write pointer from HWSP in GVT-g VM
Let GVT-g VM read the CSB and CSB write pointer from virtual HWSP, not all the host support this feature, need to check the BIT(3) of caps in PVINFO. v3 : Remove unnecessary comments. v4 : Separate VM enable patch with GVT-g implementation patch due to code dependency. v5 : Use inline for GVT virtual HWSP caps check function. v6 : Comments refine. Signed-off-by: Weinan Li <weinan.z.li@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1508039725-1066-1-git-send-email-weinan.z.li@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_vgpu.h')
-rw-r--r--drivers/gpu/drm/i915/i915_vgpu.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
index b72bd2956b70..bb8338450dc1 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.h
+++ b/drivers/gpu/drm/i915/i915_vgpu.h
@@ -30,6 +30,12 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv);
bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv);
+static inline bool
+intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv)
+{
+ return dev_priv->vgpu.caps & VGT_CAPS_HWSP_EMULATION;
+}
+
int intel_vgt_balloon(struct drm_i915_private *dev_priv);
void intel_vgt_deballoon(struct drm_i915_private *dev_priv);