diff options
| author | Madhav Chauhan <madhav.chauhan@intel.com> | 2018-11-29 16:12:33 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2018-12-03 15:55:15 +0200 |
| commit | 32250c8e0ef909884b7d5fa4f6c7ea73a6125565 (patch) | |
| tree | 809b98a65bd3c2d1b8276190d280180229a845ae /drivers/gpu/drm/i915/icl_dsi.c | |
| parent | 690c318ed8e06c2927c11fae366e55277f0cb42a (diff) | |
drm/i915/icl: Gate clocks for DSI
As per BSPEC, depending on the DSI transcoder being used,
DDI clock for the associated port should be gated. This
patch does the same.
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/e032bc3d8fff91b8c2631c73121268214615a7e8.1543500286.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/icl_dsi.c')
| -rw-r--r-- | drivers/gpu/drm/i915/icl_dsi.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 2b576a70222f..e42a99fda191 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -536,6 +536,23 @@ static void gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder) } } +static void gen11_dsi_gate_clocks(struct intel_encoder *encoder) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + u32 tmp; + enum port port; + + mutex_lock(&dev_priv->dpll_lock); + tmp = I915_READ(DPCLKA_CFGCR0_ICL); + for_each_dsi_port(port, intel_dsi->ports) { + tmp |= DPCLKA_CFGCR0_DDI_CLK_OFF(port); + } + + I915_WRITE(DPCLKA_CFGCR0_ICL, tmp); + mutex_unlock(&dev_priv->dpll_lock); +} + static void gen11_dsi_configure_transcoder(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config) @@ -883,6 +900,9 @@ gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder, /* Step (4h, 4i, 4j, 4k): Configure transcoder */ gen11_dsi_configure_transcoder(encoder, pipe_config); + + /* Step 4l: Gate DDI clocks */ + gen11_dsi_gate_clocks(encoder); } static void gen11_dsi_powerup_panel(struct intel_encoder *encoder) |