diff options
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2014-05-23 13:16:44 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-05 08:52:37 +0200 |
| commit | f618e38dedb17e86278cc7eb9a6cef184893885d (patch) | |
| tree | fcc8bf7b24dbf3bf252a1a7275a60f4a5e787747 /drivers/gpu/drm/i915/intel_display.c | |
| parent | f099a3c605724b2f848ed4edd318e20528761904 (diff) | |
drm/i915/vlv: move DPIO common reset de-assert into __vlv_set_power_well
We need to do this anytime we power gate the DPIO common well.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 4973fe03f9aa..de5992b71ed9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1525,19 +1525,6 @@ static void intel_reset_dpio(struct drm_device *dev) false); __vlv_set_power_well(dev_priv, PUNIT_POWER_WELL_DPIO_CMN_BC, true); - - /* - * From VLV2A0_DP_eDP_DPIO_driver_vbios_notes_10.docx - - * 6. De-assert cmn_reset/side_reset. Same as VLV X0. - * a. GUnit 0x2110 bit[0] set to 1 (def 0) - * b. The other bits such as sfr settings / modesel may all - * be set to 0. - * - * This should only be done on init and resume from S3 with - * both PLLs disabled, or we risk losing DPIO and PLL - * synchronization. - */ - I915_WRITE(DPIO_CTL, I915_READ(DPIO_CTL) | DPIO_CMNRST); } } |