diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-05-11 22:44:51 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-05-13 21:33:31 +0300 |
| commit | 7fe6275721c26ba84bd1ce13b2d2ecce382006bf (patch) | |
| tree | c6835b8d93422f1df238b8e5e371665c33788f9b /drivers/gpu/drm/i915/intel_display.c | |
| parent | 3861fc607e64aeefa1e480657bd57f269d0e4129 (diff) | |
drm/i915: Program BXT_CDCLK_CD2X_PIPE
BXT could change the CD2X divider synchronized with a single pipe.
So assuming the DE PLL frequency doesn't need to be changed, we could
change cdclk without shutting off the pipe (when only a single pipe is
enabled). In the meantime let's configure CDCLK_CTL for non-double
buffered CD2X update, although it shouldn't really matter as long as
the selected pipe is disabled when reprogramming the divider.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-13-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 176d23fa49c3..1e5bfe84f31e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5430,6 +5430,11 @@ static void broxton_set_cdclk(struct drm_i915_private *dev_priv, int cdclk) DRM_ERROR("timeout waiting for DE PLL lock\n"); val = I915_READ(CDCLK_CTL); + /* + * FIXME if only the cd2x divider needs changing, it could be done + * without shutting off the pipe (if only one pipe is active). + */ + val |= BXT_CDCLK_CD2X_PIPE_NONE; val &= ~BXT_CDCLK_CD2X_DIV_SEL_MASK; val |= divider; /* |