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authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2016-03-14 09:27:52 +0100
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2016-03-17 09:27:28 +0100
commit2dd66ebde4431c93bfa211bc967a6f2089283aa6 (patch)
tree851fc8e93ae3b23d8105a86d7bccf3952a808e68 /drivers/gpu/drm/i915/intel_dpll_mgr.h
parent1f7717552ef1306be3b7ed28c66c6eff550e3a23 (diff)
drm/i915: Use a crtc mask instead of a refcount for dpll functions, v2.
This makes it easier to verify correct dpll setup with only a single crtc. It is also useful to detect double dpll enable/disable. Changes since v1: - Rebase on top of Ander's dpll rework. - Change debugfs active to a mask. - Change enabled_crtcs and active_crtcs to unsigned. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1457944075-14123-2-git-send-email-maarten.lankhorst@linux.intel.com Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpll_mgr.h')
-rw-r--r--drivers/gpu/drm/i915/intel_dpll_mgr.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index 1d341472f8b0..89c5ada1a315 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -115,7 +115,7 @@ struct intel_shared_dpll_funcs {
struct intel_shared_dpll {
struct intel_shared_dpll_config config;
- int active; /* count of number of active CRTCs (i.e. DPMS on) */
+ unsigned active_mask; /* mask of active CRTCs (i.e. DPMS on) */
bool on; /* is the PLL actually active? Disabled during modeset */
const char *name;
/* should match the index in the dev_priv->shared_dplls array */