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| author | Thomas Gleixner <tglx@linutronix.de> | 2018-08-06 12:45:42 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-08-06 12:45:42 +0200 |
| commit | 9e90c7985229430428dc9ba0ec7fe422901b456d (patch) | |
| tree | cae2072feba8cc433a32d96568bbcf36070bd6e5 /drivers/gpu/drm/i915/intel_dvo.c | |
| parent | 4f7799d96e6621ce584df60739e1480a6fd89f0a (diff) | |
| parent | a8db74564b0c634667e1722264bde303d296f566 (diff) | |
Merge tag 'irqchip-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier:
- GICv3 ITS LPI allocation revamp
- GICv3 support for hypervisor-enforced LPI range
- GICv3 ITS conversion to raw spinlock
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dvo.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dvo.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index a70d767313aa..61d908e0df0e 100644 --- a/drivers/gpu/drm/i915/intel_dvo.c +++ b/drivers/gpu/drm/i915/intel_dvo.c @@ -219,6 +219,9 @@ intel_dvo_mode_valid(struct drm_connector *connector, int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; int target_clock = mode->clock; + if (mode->flags & DRM_MODE_FLAG_DBLSCAN) + return MODE_NO_DBLESCAN; + /* XXX: Validate clock range */ if (fixed_mode) { @@ -254,6 +257,9 @@ static bool intel_dvo_compute_config(struct intel_encoder *encoder, if (fixed_mode) intel_fixed_panel_mode(fixed_mode, adjusted_mode); + if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) + return false; + return true; } |