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authorChris Wilson <chris@chris-wilson.co.uk>2018-07-27 10:18:55 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2018-07-27 11:05:28 +0100
commit7a859c655d8f9e83d95ad8e4722c0da6b29590d6 (patch)
tree6ada293e484fb5a50d854b92c19fee69b5c7a2e6 /drivers/gpu/drm/i915/intel_guc.c
parent6dc17d69f83ec315157b76fbf47d4379e1266cef (diff)
drm/i915: Eliminate use of PAGE_SIZE as a virtual alignment
Using PAGE_SIZE for virtual offset alignment is superfluous as it is equal to the minimum gtt alignment and so equivalent to 0. It is also the wrong value to use as we stopped using physical page constructs for the virtual GTT, i.e. it would be preferrable to use I915_GTT_PAGE_SIZE and in these cases merely imply I915_GTT_MIN_ALIGNMENT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180727091855.1879-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc.c')
-rw-r--r--drivers/gpu/drm/i915/intel_guc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 3082d7670f05..97460982985c 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -659,7 +659,7 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
if (IS_ERR(vma))
goto err;
- ret = i915_vma_pin(vma, 0, PAGE_SIZE,
+ ret = i915_vma_pin(vma, 0, 0,
PIN_GLOBAL | PIN_OFFSET_BIAS | guc->ggtt_pin_bias);
if (ret) {
vma = ERR_PTR(ret);