diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-06-24 22:00:08 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-06-29 10:59:26 +0200 |
| commit | 6f9c784b7ec2cc9fc9fd7c5a8634b70aadd76015 (patch) | |
| tree | 8ca0da87037a1afead29367c3f79db2c515fafa1 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 852eb00dc44ea2b8896e2fa27c6a36a1f697ba5a (diff) | |
drm/i915: Don't do PM5/DDR DVFS with multiple pipes
Enabling PM5/DDR DVFS with multiple active pipes isn't a validated
configuration. It does seem to work most of the time at least, but
there is clearly an additional risk of underruns, so let's not play
with fire.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a023b40c046b..16ca34fb5380 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -1327,6 +1327,9 @@ static void vlv_merge_wm(struct drm_device *dev, if (num_active_crtcs != 1) wm->cxsr = false; + if (num_active_crtcs > 1) + wm->level = VLV_WM_LEVEL_PM2; + for_each_intel_crtc(dev, crtc) { struct vlv_wm_state *wm_state = &crtc->wm_state; enum pipe pipe = crtc->pipe; |