diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-01-12 21:08:36 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-01-13 18:46:44 +0200 |
| commit | ce1e5c140ce945ef6fc4ee4803f0c2f774873d8f (patch) | |
| tree | 4e1dca90cc894e651e9f883bb2510558402aec11 /drivers/gpu/drm/i915/intel_renderstate.h | |
| parent | d843310d146452105e2bc54b8d82e52ad727697f (diff) | |
drm/i915: s/intel_gen4_compute_page_offset/intel_compute_tile_offset/
Since intel_gen4_compute_page_offset() can now handle tiling formats
all the way down to gen2, rename it to intel_compute_tile_offset().
Not that we actually use it on gen2/3 since there's no DSPSURF etc.
registers which would take a page aligned address.
v2: s/page/tile/ (Daniel)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1452625717-9713-7-git-send-email-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_renderstate.h')
0 files changed, 0 insertions, 0 deletions