diff options
author | Dave Airlie <airlied@redhat.com> | 2021-06-10 13:37:07 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2021-06-10 13:45:11 +1000 |
commit | a2098e857b765bd39a9c67c81448f60d5c475846 (patch) | |
tree | 41df99b153f38b23f5c9289b30920c1c70e678f1 /drivers/gpu/drm/i915/selftests | |
parent | 691cf8cd7a531dbfcc29d09a23c509a86fd9b24f (diff) | |
parent | 0d6695b112762aa7aad28c46e65561389b6f50d6 (diff) |
Merge tag 'drm-intel-next-2021-06-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Cross-subsystem Changes:
- x86/gpu: add JasperLake to gen11 early quirks
(Although the patch lacks the Ack info, it has been Acked by Borislav)
Driver Changes:
- General DMC improves (Anusha)
- More ADL-P enabling (Vandita, Matt, Jose, Mika, Anusha, Imre, Lucas, Jani, Manasi, Ville, Stanislav)
- Introduce MBUS relative dbuf offset (Ville)
- PSR fixes and improvements (Gwan, Jose, Ville)
- Re-enable LTTPR non-transparent LT mode for DPCD_REV < 1.4 (Ville)
- Remove duplicated declarations (Shaokun, Wan)
- Check HDMI sink deep color capabilities during .mode_valid (Ville)
- Fix display flicker screan related to console and FBC (Chris)
- Remaining conversions of GRAPHICS_VER (Lucas)
- Drop invalid FIXME (Jose)
- Fix bigjoiner check in dsc_disable (Vandita)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YMEy2Ew82BeL/hDK@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/selftests')
-rw-r--r-- | drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/selftests/i915_perf.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/selftests/i915_request.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/selftests/igt_spinner.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 |
5 files changed, 16 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c index 0a1472bb12bc..f843a5040706 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c @@ -1884,9 +1884,9 @@ static int igt_cs_tlb(void *arg) u32 *cs = batch + i * 64 / sizeof(*cs); u64 addr = (vm->total - PAGE_SIZE) + i * sizeof(u32); - GEM_BUG_ON(INTEL_GEN(i915) < 6); + GEM_BUG_ON(GRAPHICS_VER(i915) < 6); cs[0] = MI_STORE_DWORD_IMM_GEN4; - if (INTEL_GEN(i915) >= 8) { + if (GRAPHICS_VER(i915) >= 8) { cs[1] = lower_32_bits(addr); cs[2] = upper_32_bits(addr); cs[3] = i; diff --git a/drivers/gpu/drm/i915/selftests/i915_perf.c b/drivers/gpu/drm/i915/selftests/i915_perf.c index bfb0290967a1..9e9a6cb1d9e5 100644 --- a/drivers/gpu/drm/i915/selftests/i915_perf.c +++ b/drivers/gpu/drm/i915/selftests/i915_perf.c @@ -98,7 +98,7 @@ test_stream(struct i915_perf *perf) I915_ENGINE_CLASS_RENDER, 0), .sample_flags = SAMPLE_OA_REPORT, - .oa_format = IS_GEN(perf->i915, 12) ? + .oa_format = GRAPHICS_VER(perf->i915) == 12 ? I915_OA_FORMAT_A32u40_A4u32_B8_C8 : I915_OA_FORMAT_C4_B8, }; struct i915_perf_stream *stream; @@ -162,7 +162,7 @@ static int write_timestamp(struct i915_request *rq, int slot) return PTR_ERR(cs); len = 5; - if (INTEL_GEN(rq->engine->i915) >= 8) + if (GRAPHICS_VER(rq->engine->i915) >= 8) len++; *cs++ = GFX_OP_PIPE_CONTROL(len); @@ -363,7 +363,7 @@ static int live_noa_gpr(void *arg) } cmd = MI_STORE_REGISTER_MEM; - if (INTEL_GEN(i915) >= 8) + if (GRAPHICS_VER(i915) >= 8) cmd++; cmd |= MI_USE_GGTT; diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c index ee8e753d98ce..db367a6721c5 100644 --- a/drivers/gpu/drm/i915/selftests/i915_request.c +++ b/drivers/gpu/drm/i915/selftests/i915_request.c @@ -963,7 +963,7 @@ out_batch: static struct i915_vma *recursive_batch(struct drm_i915_private *i915) { struct drm_i915_gem_object *obj; - const int gen = INTEL_GEN(i915); + const int ver = GRAPHICS_VER(i915); struct i915_vma *vma; u32 *cmd; int err; @@ -988,11 +988,11 @@ static struct i915_vma *recursive_batch(struct drm_i915_private *i915) goto err; } - if (gen >= 8) { + if (ver >= 8) { *cmd++ = MI_BATCH_BUFFER_START | 1 << 8 | 1; *cmd++ = lower_32_bits(vma->node.start); *cmd++ = upper_32_bits(vma->node.start); - } else if (gen >= 6) { + } else if (ver >= 6) { *cmd++ = MI_BATCH_BUFFER_START | 1 << 8; *cmd++ = lower_32_bits(vma->node.start); } else { @@ -2482,7 +2482,7 @@ static int perf_request_latency(void *arg) struct pm_qos_request qos; int err = 0; - if (INTEL_GEN(i915) < 8) /* per-engine CS timestamp, semaphores */ + if (GRAPHICS_VER(i915) < 8) /* per-engine CS timestamp, semaphores */ return 0; cpu_latency_qos_add_request(&qos, 0); /* disable cstates */ diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c index 5fe397b7d1d9..24d87d0fc747 100644 --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c @@ -174,15 +174,15 @@ igt_spinner_create_request(struct igt_spinner *spin, batch = spin->batch; - if (INTEL_GEN(rq->engine->i915) >= 8) { + if (GRAPHICS_VER(rq->engine->i915) >= 8) { *batch++ = MI_STORE_DWORD_IMM_GEN4; *batch++ = lower_32_bits(hws_address(hws, rq)); *batch++ = upper_32_bits(hws_address(hws, rq)); - } else if (INTEL_GEN(rq->engine->i915) >= 6) { + } else if (GRAPHICS_VER(rq->engine->i915) >= 6) { *batch++ = MI_STORE_DWORD_IMM_GEN4; *batch++ = 0; *batch++ = hws_address(hws, rq); - } else if (INTEL_GEN(rq->engine->i915) >= 4) { + } else if (GRAPHICS_VER(rq->engine->i915) >= 4) { *batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; *batch++ = 0; *batch++ = hws_address(hws, rq); @@ -194,11 +194,11 @@ igt_spinner_create_request(struct igt_spinner *spin, *batch++ = arbitration_command; - if (INTEL_GEN(rq->engine->i915) >= 8) + if (GRAPHICS_VER(rq->engine->i915) >= 8) *batch++ = MI_BATCH_BUFFER_START | BIT(8) | 1; else if (IS_HASWELL(rq->engine->i915)) *batch++ = MI_BATCH_BUFFER_START | MI_BATCH_PPGTT_HSW; - else if (INTEL_GEN(rq->engine->i915) >= 6) + else if (GRAPHICS_VER(rq->engine->i915) >= 6) *batch++ = MI_BATCH_BUFFER_START; else *batch++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT; @@ -216,7 +216,7 @@ igt_spinner_create_request(struct igt_spinner *spin, } flags = 0; - if (INTEL_GEN(rq->engine->i915) <= 5) + if (GRAPHICS_VER(rq->engine->i915) <= 5) flags |= I915_DISPATCH_SECURE; err = engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, flags); diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c index f76c9bcec735..8ef9e6a4ad05 100644 --- a/drivers/gpu/drm/i915/selftests/intel_uncore.c +++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c @@ -321,7 +321,7 @@ static int live_fw_table(void *arg) /* Confirm the table we load is still valid */ return intel_fw_table_check(gt->uncore->fw_domains_table, gt->uncore->fw_domains_table_entries, - INTEL_GEN(gt->i915) >= 9); + GRAPHICS_VER(gt->i915) >= 9); } int intel_uncore_live_selftests(struct drm_i915_private *i915) |