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authorLinus Walleij <linus.walleij@linaro.org>2020-08-09 00:31:22 +0200
committerLinus Walleij <linus.walleij@linaro.org>2020-08-13 16:39:26 +0200
commit42bac89a1730a32ed8415b745affc7de0be28e45 (patch)
tree6026cdeb07bfb9b93efe847b5180a06a292b34a4 /drivers/gpu/drm/mcde/mcde_dsi.c
parentc4842d4d0f744bf419a1b011fa3ce0ed98fcdc10 (diff)
drm/mcde: Enable the DSI link with display
The MCDE DSI link hardware which is modeled like a bridge in DRM, connected further to the panel bridge, creating a pipeline. We have been using the .pre_enable(), .enable(), .disable() and .post_disable() callbacks from the bridge to set this up in a chained manner: first the display controller goes online and then in successive order each bridge in the pipeline. Inside DRM it works like this: drm_atomic_helper_commit_tail() drm_atomic_helper_commit_modeset_enables() struct drm_crtc_helper_funcs .atomic_enable() struct drm_simple_display_pipe_funcs .enable() MCDE display enable call drm_atomic_bridge_chain_enable() struct drm_bridge_funcs .pre_enable() mcde_dsi_bridge_pre_enable() panel_bridge_pre_enable() struct drm_panel_funcs .prepare() struct drm_bridge_funcs .enable() mcde_dsi_bridge_enable() panel_bridge_enable() struct drm_panel_funcs .enable() A similar sequence is executed for disabling. Unfortunately this is not what the hardware needs: at a certain stage in the enablement of the display controller the DSI link needs to come up to support video mode, else something (like a FIFO flow) locks up the hardware and we never get picture. Fix this by simply leaving the pre|enable and post|disable callbacks unused, and establish two cross-calls from the display controller to bring up the DSI link at the right place in the display bring-up sequence and vice versa in the shutdown sequence. For command mode displays, it works just fine to also enable the display flow early. The only time we hold it back right now is in one-shot mode, on-demand display updates. When combined with the previous patch and some patches for the S6E63M0 display controller to support DSI mode, this gives working display on the Samsung GT-I8190 (Golden) phone. It has also been tested working on the Samsung GT-S7710 (Skomer) phone. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: newbytee@protonmail.com Cc: Stephan Gerhold <stephan@gerhold.net> Link: https://patchwork.freedesktop.org/patch/msgid/20200808223122.1492124-4-linus.walleij@linaro.org
Diffstat (limited to 'drivers/gpu/drm/mcde/mcde_dsi.c')
-rw-r--r--drivers/gpu/drm/mcde/mcde_dsi.c44
1 files changed, 17 insertions, 27 deletions
diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c
index ae3d146912f2..ae70f76bfb89 100644
--- a/drivers/gpu/drm/mcde/mcde_dsi.c
+++ b/drivers/gpu/drm/mcde/mcde_dsi.c
@@ -826,23 +826,11 @@ static void mcde_dsi_start(struct mcde_dsi *d)
dev_info(d->dev, "DSI link enabled\n");
}
-
-static void mcde_dsi_bridge_enable(struct drm_bridge *bridge)
-{
- struct mcde_dsi *d = bridge_to_mcde_dsi(bridge);
- u32 val;
-
- if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
- /* Enable video mode */
- val = readl(d->regs + DSI_MCTL_MAIN_DATA_CTL);
- val |= DSI_MCTL_MAIN_DATA_CTL_VID_EN;
- writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL);
- }
-
- dev_info(d->dev, "enable DSI master\n");
-};
-
-static void mcde_dsi_bridge_pre_enable(struct drm_bridge *bridge)
+/*
+ * Notice that this is called from inside the display controller
+ * and not from the bridge callbacks.
+ */
+void mcde_dsi_enable(struct drm_bridge *bridge)
{
struct mcde_dsi *d = bridge_to_mcde_dsi(bridge);
unsigned long hs_freq, lp_freq;
@@ -920,6 +908,11 @@ static void mcde_dsi_bridge_pre_enable(struct drm_bridge *bridge)
val |= DSI_VID_MODE_STS_CTL_ERR_MISSING_VSYNC;
val |= DSI_VID_MODE_STS_CTL_ERR_MISSING_DATA;
writel(val, d->regs + DSI_VID_MODE_STS_CTL);
+
+ /* Enable video mode */
+ val = readl(d->regs + DSI_MCTL_MAIN_DATA_CTL);
+ val |= DSI_MCTL_MAIN_DATA_CTL_VID_EN;
+ writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL);
} else {
/* Command mode, clear IF1 ID */
val = readl(d->regs + DSI_CMD_MODE_CTL);
@@ -932,6 +925,8 @@ static void mcde_dsi_bridge_pre_enable(struct drm_bridge *bridge)
val &= ~DSI_CMD_MODE_CTL_IF1_ID_MASK;
writel(val, d->regs + DSI_CMD_MODE_CTL);
}
+
+ dev_info(d->dev, "enabled MCDE DSI master\n");
}
static void mcde_dsi_bridge_mode_set(struct drm_bridge *bridge,
@@ -994,7 +989,11 @@ static void mcde_dsi_wait_for_video_mode_stop(struct mcde_dsi *d)
}
}
-static void mcde_dsi_bridge_disable(struct drm_bridge *bridge)
+/*
+ * Notice that this is called from inside the display controller
+ * and not from the bridge callbacks.
+ */
+void mcde_dsi_disable(struct drm_bridge *bridge)
{
struct mcde_dsi *d = bridge_to_mcde_dsi(bridge);
u32 val;
@@ -1009,11 +1008,6 @@ static void mcde_dsi_bridge_disable(struct drm_bridge *bridge)
/* Stop command mode */
mcde_dsi_wait_for_command_mode_stop(d);
}
-}
-
-static void mcde_dsi_bridge_post_disable(struct drm_bridge *bridge)
-{
- struct mcde_dsi *d = bridge_to_mcde_dsi(bridge);
/*
* Stop clocks and terminate any DSI traffic here so the panel can
@@ -1052,10 +1046,6 @@ static int mcde_dsi_bridge_attach(struct drm_bridge *bridge,
static const struct drm_bridge_funcs mcde_dsi_bridge_funcs = {
.attach = mcde_dsi_bridge_attach,
.mode_set = mcde_dsi_bridge_mode_set,
- .disable = mcde_dsi_bridge_disable,
- .enable = mcde_dsi_bridge_enable,
- .pre_enable = mcde_dsi_bridge_pre_enable,
- .post_disable = mcde_dsi_bridge_post_disable,
};
static int mcde_dsi_bind(struct device *dev, struct device *master,