diff options
| author | Neil Armstrong <narmstrong@baylibre.com> | 2020-07-03 10:07:26 +0200 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2020-07-03 10:12:29 +0200 |
| commit | 376b1391d9e99f24b8d9461a08c4735ba9d5495e (patch) | |
| tree | a890a65334b6be9f42be38591c3e9bd91e13354d /drivers/gpu/drm/meson | |
| parent | e860785d5730665e04e0ac301aa14ed3779c4d92 (diff) | |
drm/meson: overlay: setup overlay for Amlogic FBC Memory Saving mode
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use
a different superblock size for the Memory Saving mode.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-5-narmstrong@baylibre.com
Diffstat (limited to 'drivers/gpu/drm/meson')
| -rw-r--r-- | drivers/gpu/drm/meson/meson_overlay.c | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/gpu/drm/meson/meson_overlay.c b/drivers/gpu/drm/meson/meson_overlay.c index 293f606ba164..1566a887d482 100644 --- a/drivers/gpu/drm/meson/meson_overlay.c +++ b/drivers/gpu/drm/meson/meson_overlay.c @@ -486,6 +486,10 @@ static void meson_overlay_atomic_update(struct drm_plane *plane, AFBC_HOLD_LINE_NUM(8) | AFBC_BURST_LEN(2); + if (fb->modifier & DRM_FORMAT_MOD_AMLOGIC_FBC(0, + AMLOGIC_FBC_OPTION_MEM_SAVING)) + priv->viu.vd1_afbc_mode |= AFBC_BLK_MEM_MODE; + priv->viu.vd1_afbc_en = 0x1600 | AFBC_DEC_ENABLE; priv->viu.vd1_afbc_conv_ctrl = AFBC_CONV_LBUF_LEN(256); @@ -671,12 +675,17 @@ static void meson_overlay_atomic_update(struct drm_plane *plane, } if (priv->viu.vd1_afbc) { + /* Default mode is 4k per superblock */ + unsigned long block_size = 4096; unsigned long body_size; - /* Default mode is 4k per superblock */ + /* 8bit mem saving mode is 3072bytes per superblock */ + if (priv->viu.vd1_afbc_mode & AFBC_BLK_MEM_MODE) + block_size = 3072; + body_size = (ALIGN(priv->viu.vd1_stride0, 64) / 64) * (ALIGN(priv->viu.vd1_height0, 32) / 32) * - 4096; + block_size; priv->viu.vd1_afbc_body_addr = priv->viu.vd1_addr0 >> 4; @@ -734,6 +743,9 @@ static bool meson_overlay_format_mod_supported(struct drm_plane *plane, unsigned int layout = modifier & DRM_FORMAT_MOD_AMLOGIC_FBC( __fourcc_mod_amlogic_layout_mask, 0); + unsigned int options = + (modifier >> __fourcc_mod_amlogic_options_shift) & + __fourcc_mod_amlogic_options_mask; if (format != DRM_FORMAT_YUV420_8BIT && format != DRM_FORMAT_YUV420_10BIT) { @@ -748,6 +760,13 @@ static bool meson_overlay_format_mod_supported(struct drm_plane *plane, return false; } + if (options && + options != AMLOGIC_FBC_OPTION_MEM_SAVING) { + DRM_DEBUG_KMS("%llx invalid layout %x\n", + modifier, layout); + return false; + } + return true; } @@ -781,6 +800,8 @@ static const uint32_t supported_drm_formats[] = { }; static const uint64_t format_modifiers[] = { + DRM_FORMAT_MOD_AMLOGIC_FBC(AMLOGIC_FBC_LAYOUT_BASIC, + AMLOGIC_FBC_OPTION_MEM_SAVING), DRM_FORMAT_MOD_AMLOGIC_FBC(AMLOGIC_FBC_LAYOUT_BASIC, 0), DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_MOD_INVALID, |