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authorKrishna Manikandan <mkrishn@codeaurora.org>2020-10-16 19:40:43 +0530
committerRob Clark <robdclark@chromium.org>2020-11-01 10:11:59 -0800
commitb3d91800d9ac35014e0349292273a6fa7938d402 (patch)
tree7df1768f68354c9be9cec39476d139d5a3ac02d2 /drivers/gpu/drm/msm/adreno/a2xx_gpu.h
parent3650b228f83adda7e5ee532e2b90429c03f7b9ec (diff)
drm/msm: Fix race condition in msm driver with async layer updates
When there are back to back commits with async cursor update, there is a case where second commit can program the DPU hw blocks while first didn't complete flushing config to HW. Synchronize the compositions such that second commit waits until first commit flushes the composition. This change also introduces per crtc commit lock, such that commits on different crtcs are not blocked by each other. Changes in v2: - Use an array of mutexes in kms to handle commit lock per crtc. (Rob Clark) Changes in v3: - Add wrapper functions to handle lock and unlock of commit_lock for each crtc. (Rob Clark) Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a2xx_gpu.h')
0 files changed, 0 insertions, 0 deletions