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authorKonrad Dybcio <konrad.dybcio@somainline.org>2021-01-13 19:33:37 +0100
committerRob Clark <robdclark@chromium.org>2021-01-31 11:34:35 -0800
commit89c1ab960717fb0e9b61c8cf90316bd41309e90a (patch)
tree42407a25c1fe7cb913d2b901b811a46cca7f8d24 /drivers/gpu/drm/msm/adreno/a5xx_gpu.c
parent9deba2b8a5b5e15e8603a6b06abc0e6493c0f868 (diff)
drm/msm/a5xx: Fix VPC protect value in gpu_write()
The upstream API for some reason uses logbase2 instead of just passing the argument as-is, whereas downstream CAF kernel does the latter. Hence, a mistake has been made when porting: 4 is the value that's supposed to be passed, but log2(4) = 2. Changing the value to 16 (= 2^4) fixes the issue. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a5xx_gpu.c')
-rw-r--r--drivers/gpu/drm/msm/adreno/a5xx_gpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 66980f4cd93e..24ab51bb5a01 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -821,7 +821,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
/* VPC */
gpu_write(gpu, REG_A5XX_CP_PROTECT(14), ADRENO_PROTECT_RW(0xE68, 8));
- gpu_write(gpu, REG_A5XX_CP_PROTECT(15), ADRENO_PROTECT_RW(0xE70, 4));
+ gpu_write(gpu, REG_A5XX_CP_PROTECT(15), ADRENO_PROTECT_RW(0xE70, 16));
/* UCHE */
gpu_write(gpu, REG_A5XX_CP_PROTECT(16), ADRENO_PROTECT_RW(0xE80, 16));