diff options
| author | Stephane Viau <sviau@codeaurora.org> | 2015-03-09 09:11:04 -0400 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2015-04-01 19:29:36 -0400 |
| commit | f52538125e4dfb2a74f2efd915430d6fc39d0124 (patch) | |
| tree | 9405664914de9acf8f00d7767b90230de6134f03 /drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | |
| parent | ba474a02cb1009574a7cdcc29de9ca2d0b3c6df6 (diff) | |
drm/msm/mdp5: Separate MDP5 domain from MDSS domain
MDP block is actually contained inside the MDSS block. For some
chipsets, the base address of the MDP registers is different from the
current (assumed) 0x100 offset.
Like CTL and LM blocks, this changes introduce a dynamic offset
for the MDP instance, which can be found out at runtime, once the
MDSS HW version is read.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c')
| -rw-r--r-- | drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c index 57d620b40240..4c570e646b74 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c @@ -24,6 +24,10 @@ const struct mdp5_cfg_hw *mdp5_cfg = NULL; const struct mdp5_cfg_hw msm8x74_config = { .name = "msm8x74", + .mdp = { + .count = 1, + .base = { 0x00100 }, + }, .smp = { .mmb_count = 22, .mmb_size = 4096, @@ -75,6 +79,10 @@ const struct mdp5_cfg_hw msm8x74_config = { const struct mdp5_cfg_hw apq8084_config = { .name = "apq8084", + .mdp = { + .count = 1, + .base = { 0x00100 }, + }, .smp = { .mmb_count = 44, .mmb_size = 8192, |