drm/nouveau/mspdec: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

1 files changed, 23 insertions, 24 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index e256869dbb89..49d554e35927 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -1098,7 +1098,7 @@ nv98_chipset = {
 	.dma      = { 0x00000001, nv50_dma_new },
 	.fifo     = { 0x00000001, g84_fifo_new },
 	.gr       = { 0x00000001, g84_gr_new },
-	.mspdec = g98_mspdec_new,
+	.mspdec   = { 0x00000001, g98_mspdec_new },
 	.msppp = g98_msppp_new,
 	.msvld = g98_msvld_new,
 	.pm = g84_pm_new,
@@ -1165,7 +1165,7 @@ nva3_chipset = {
 	.fifo     = { 0x00000001, g84_fifo_new },
 	.gr       = { 0x00000001, gt215_gr_new },
 	.mpeg     = { 0x00000001, g84_mpeg_new },
-	.mspdec = gt215_mspdec_new,
+	.mspdec   = { 0x00000001, gt215_mspdec_new },
 	.msppp = gt215_msppp_new,
 	.msvld = gt215_msvld_new,
 	.pm = gt215_pm_new,
@@ -1198,7 +1198,7 @@ nva5_chipset = {
 	.dma      = { 0x00000001, nv50_dma_new },
 	.fifo     = { 0x00000001, g84_fifo_new },
 	.gr       = { 0x00000001, gt215_gr_new },
-	.mspdec = gt215_mspdec_new,
+	.mspdec   = { 0x00000001, gt215_mspdec_new },
 	.msppp = gt215_msppp_new,
 	.msvld = gt215_msvld_new,
 	.pm = gt215_pm_new,
@@ -1231,7 +1231,7 @@ nva8_chipset = {
 	.dma      = { 0x00000001, nv50_dma_new },
 	.fifo     = { 0x00000001, g84_fifo_new },
 	.gr       = { 0x00000001, gt215_gr_new },
-	.mspdec = gt215_mspdec_new,
+	.mspdec   = { 0x00000001, gt215_mspdec_new },
 	.msppp = gt215_msppp_new,
 	.msvld = gt215_msvld_new,
 	.pm = gt215_pm_new,
@@ -1262,7 +1262,7 @@ nvaa_chipset = {
 	.dma      = { 0x00000001, nv50_dma_new },
 	.fifo     = { 0x00000001, g84_fifo_new },
 	.gr       = { 0x00000001, gt200_gr_new },
-	.mspdec = g98_mspdec_new,
+	.mspdec   = { 0x00000001, g98_mspdec_new },
 	.msppp = g98_msppp_new,
 	.msvld = g98_msvld_new,
 	.pm = g84_pm_new,
@@ -1294,7 +1294,7 @@ nvac_chipset = {
 	.dma      = { 0x00000001, nv50_dma_new },
 	.fifo     = { 0x00000001, g84_fifo_new },
 	.gr       = { 0x00000001, mcp79_gr_new },
-	.mspdec = g98_mspdec_new,
+	.mspdec   = { 0x00000001, g98_mspdec_new },
 	.msppp = g98_msppp_new,
 	.msvld = g98_msvld_new,
 	.pm = g84_pm_new,
@@ -1328,7 +1328,7 @@ nvaf_chipset = {
 	.dma      = { 0x00000001, nv50_dma_new },
 	.fifo     = { 0x00000001, g84_fifo_new },
 	.gr       = { 0x00000001, mcp89_gr_new },
-	.mspdec = gt215_mspdec_new,
+	.mspdec   = { 0x00000001, gt215_mspdec_new },
 	.msppp = gt215_msppp_new,
 	.msvld = mcp89_msvld_new,
 	.pm = gt215_pm_new,
@@ -1364,7 +1364,7 @@ nvc0_chipset = {
 	.dma      = { 0x00000001, gf100_dma_new },
 	.fifo     = { 0x00000001, gf100_fifo_new },
 	.gr       = { 0x00000001, gf100_gr_new },
-	.mspdec = gf100_mspdec_new,
+	.mspdec   = { 0x00000001, gf100_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gf100_msvld_new,
 	.pm = gf100_pm_new,
@@ -1400,7 +1400,7 @@ nvc1_chipset = {
 	.dma      = { 0x00000001, gf100_dma_new },
 	.fifo     = { 0x00000001, gf100_fifo_new },
 	.gr       = { 0x00000001, gf108_gr_new },
-	.mspdec = gf100_mspdec_new,
+	.mspdec   = { 0x00000001, gf100_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gf100_msvld_new,
 	.pm = gf108_pm_new,
@@ -1436,7 +1436,7 @@ nvc3_chipset = {
 	.dma      = { 0x00000001, gf100_dma_new },
 	.fifo     = { 0x00000001, gf100_fifo_new },
 	.gr       = { 0x00000001, gf104_gr_new },
-	.mspdec = gf100_mspdec_new,
+	.mspdec   = { 0x00000001, gf100_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gf100_msvld_new,
 	.pm = gf100_pm_new,
@@ -1472,7 +1472,7 @@ nvc4_chipset = {
 	.dma      = { 0x00000001, gf100_dma_new },
 	.fifo     = { 0x00000001, gf100_fifo_new },
 	.gr       = { 0x00000001, gf104_gr_new },
-	.mspdec = gf100_mspdec_new,
+	.mspdec   = { 0x00000001, gf100_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gf100_msvld_new,
 	.pm = gf100_pm_new,
@@ -1508,7 +1508,7 @@ nvc8_chipset = {
 	.dma      = { 0x00000001, gf100_dma_new },
 	.fifo     = { 0x00000001, gf100_fifo_new },
 	.gr       = { 0x00000001, gf110_gr_new },
-	.mspdec = gf100_mspdec_new,
+	.mspdec   = { 0x00000001, gf100_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gf100_msvld_new,
 	.pm = gf100_pm_new,
@@ -1544,7 +1544,7 @@ nvce_chipset = {
 	.dma      = { 0x00000001, gf100_dma_new },
 	.fifo     = { 0x00000001, gf100_fifo_new },
 	.gr       = { 0x00000001, gf104_gr_new },
-	.mspdec = gf100_mspdec_new,
+	.mspdec   = { 0x00000001, gf100_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gf100_msvld_new,
 	.pm = gf100_pm_new,
@@ -1580,7 +1580,7 @@ nvcf_chipset = {
 	.dma      = { 0x00000001, gf100_dma_new },
 	.fifo     = { 0x00000001, gf100_fifo_new },
 	.gr       = { 0x00000001, gf104_gr_new },
-	.mspdec = gf100_mspdec_new,
+	.mspdec   = { 0x00000001, gf100_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gf100_msvld_new,
 	.pm = gf100_pm_new,
@@ -1615,7 +1615,7 @@ nvd7_chipset = {
 	.dma      = { 0x00000001, gf119_dma_new },
 	.fifo     = { 0x00000001, gf100_fifo_new },
 	.gr       = { 0x00000001, gf117_gr_new },
-	.mspdec = gf100_mspdec_new,
+	.mspdec   = { 0x00000001, gf100_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gf100_msvld_new,
 	.pm = gf117_pm_new,
@@ -1651,7 +1651,7 @@ nvd9_chipset = {
 	.dma      = { 0x00000001, gf119_dma_new },
 	.fifo     = { 0x00000001, gf100_fifo_new },
 	.gr       = { 0x00000001, gf119_gr_new },
-	.mspdec = gf100_mspdec_new,
+	.mspdec   = { 0x00000001, gf100_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gf100_msvld_new,
 	.pm = gf117_pm_new,
@@ -1688,7 +1688,7 @@ nve4_chipset = {
 	.dma      = { 0x00000001, gf119_dma_new },
 	.fifo     = { 0x00000001, gk104_fifo_new },
 	.gr       = { 0x00000001, gk104_gr_new },
-	.mspdec = gk104_mspdec_new,
+	.mspdec   = { 0x00000001, gk104_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gk104_msvld_new,
 	.pm = gk104_pm_new,
@@ -1725,7 +1725,7 @@ nve6_chipset = {
 	.dma      = { 0x00000001, gf119_dma_new },
 	.fifo     = { 0x00000001, gk104_fifo_new },
 	.gr       = { 0x00000001, gk104_gr_new },
-	.mspdec = gk104_mspdec_new,
+	.mspdec   = { 0x00000001, gk104_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gk104_msvld_new,
 	.pm = gk104_pm_new,
@@ -1762,7 +1762,7 @@ nve7_chipset = {
 	.dma      = { 0x00000001, gf119_dma_new },
 	.fifo     = { 0x00000001, gk104_fifo_new },
 	.gr       = { 0x00000001, gk104_gr_new },
-	.mspdec = gk104_mspdec_new,
+	.mspdec   = { 0x00000001, gk104_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gk104_msvld_new,
 	.pm = gk104_pm_new,
@@ -1824,7 +1824,7 @@ nvf0_chipset = {
 	.dma      = { 0x00000001, gf119_dma_new },
 	.fifo     = { 0x00000001, gk110_fifo_new },
 	.gr       = { 0x00000001, gk110_gr_new },
-	.mspdec = gk104_mspdec_new,
+	.mspdec   = { 0x00000001, gk104_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gk104_msvld_new,
 	.sw = gf100_sw_new,
@@ -1860,7 +1860,7 @@ nvf1_chipset = {
 	.dma      = { 0x00000001, gf119_dma_new },
 	.fifo     = { 0x00000001, gk110_fifo_new },
 	.gr       = { 0x00000001, gk110b_gr_new },
-	.mspdec = gk104_mspdec_new,
+	.mspdec   = { 0x00000001, gk104_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gk104_msvld_new,
 	.sw = gf100_sw_new,
@@ -1896,7 +1896,7 @@ nv106_chipset = {
 	.dma      = { 0x00000001, gf119_dma_new },
 	.fifo     = { 0x00000001, gk208_fifo_new },
 	.gr       = { 0x00000001, gk208_gr_new },
-	.mspdec = gk104_mspdec_new,
+	.mspdec   = { 0x00000001, gk104_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gk104_msvld_new,
 	.sw = gf100_sw_new,
@@ -1932,7 +1932,7 @@ nv108_chipset = {
 	.dma      = { 0x00000001, gf119_dma_new },
 	.fifo     = { 0x00000001, gk208_fifo_new },
 	.gr       = { 0x00000001, gk208_gr_new },
-	.mspdec = gk104_mspdec_new,
+	.mspdec   = { 0x00000001, gk104_mspdec_new },
 	.msppp = gf100_msppp_new,
 	.msvld = gk104_msvld_new,
 	.sw = gf100_sw_new,
@@ -3174,7 +3174,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 #include <core/layout.h>
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
-		_(NVKM_ENGINE_MSPDEC  ,   mspdec);
 		_(NVKM_ENGINE_MSPPP   ,    msppp);
 		_(NVKM_ENGINE_MSVLD   ,    msvld);
 		_(NVKM_ENGINE_NVENC0  , nvenc[0]);