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authorBen Skeggs <bskeggs@redhat.com>2018-05-08 20:39:46 +1000
committerBen Skeggs <bskeggs@redhat.com>2018-05-18 15:01:22 +1000
commit334cc26d4db10ae7d8f18de27869b95fe84c7d28 (patch)
tree6a85ed1f3d0cc63566f4c06c7c35929bf9ae1763 /drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h
parenteda12417d3daf6cb37f41e9b1c46854e7dd75e91 (diff)
drm/nouveau/fifo/gp100-: force individual channels into a channel group
RM does this for some reason, and is enforced in HW on Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h
index 1d70a5dc0762..1d182d8d2fce 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h
@@ -68,6 +68,7 @@ struct gk104_fifo_func {
int (*ctor)(struct gk104_fifo *, const struct nvkm_oclass *,
void *, u32, struct nvkm_object **);
} chan;
+ bool cgrp_force;
};
int gk104_fifo_new_(const struct gk104_fifo_func *, struct nvkm_device *,