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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2016-09-22 14:06:51 +0300
committerTomi Valkeinen <tomi.valkeinen@ti.com>2016-11-02 10:48:18 +0200
commitd5bcf0aa3f6fb396fc8099a4e5960f9274b0dae9 (patch)
tree55aac9f37cd4dbd0d389470510232e828c5c20a2 /drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
parenta85f4a80784b34362568a0ff1f34aaa3357462a0 (diff)
drm/omap: omap_display_timings: rename vsw to vsync_len
In preparation to move the stack to use the generic videmode struct for display timing information rename the vsw member to vsync_len. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm/dss/hdmi_wp.c')
-rw-r--r--drivers/gpu/drm/omapdrm/dss/hdmi_wp.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
index e4a431cb33a4..ba964c12148d 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
@@ -188,7 +188,7 @@ void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
timing_v |= FLD_VAL(timings->vbp, 31, 20);
timing_v |= FLD_VAL(timings->vfp, 19, 8);
- timing_v |= FLD_VAL(timings->vsw, 7, 0);
+ timing_v |= FLD_VAL(timings->vsync_len, 7, 0);
hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_V, timing_v);
}
@@ -206,7 +206,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
timings->hsync_len = param->timings.hsync_len;
timings->vbp = param->timings.vbp;
timings->vfp = param->timings.vfp;
- timings->vsw = param->timings.vsw;
+ timings->vsync_len = param->timings.vsync_len;
timings->vsync_level = param->timings.vsync_level;
timings->hsync_level = param->timings.hsync_level;
@@ -217,7 +217,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
video_fmt->y_res /= 2;
timings->vbp /= 2;
timings->vfp /= 2;
- timings->vsw /= 2;
+ timings->vsync_len /= 2;
}
if (param->timings.double_pixel) {